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| user?s manual ????????????? ???????????? ?? ( htt p ://www.renesas.com ) pd79f7023, 79f7024 ?? ?? rev.1.10 2013.11 8 8 ?? ????
notice 1. descriptions of circuits, software and other related informat ion in this document are provided only to illustrate the operat ion of semiconductor products and application examples. you are fully re sponsible for the incorporation of these circuits, software, and information in the design of your equipment. renesas el ectronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2. renesas electronics has used reasonable care in preparing th e information included in this document, but renesas electronics does not warrant that such information is error free. renesas electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. 3. renesas electronics does not assume any liability for infringeme nt of patents, copyrights, or other intellectual property ri ghts of third parties by or arising from the use of renesas electronics pr oducts or technical information described in this document. no license, express, implied or otherwise, is granted hereby under any patents, copyrights or othe r intellectual property rights o f renesas electronics or others. 4. you should not alter, modify, copy, or otherwise misappropriate any re nesas electronics product, wh ether in whole or in part . renesas electronics assumes no responsibilit y for any losses incurred by you or third parties arising from such alteration, modification, copy or otherwise misappr opriation of renesas electronics product. 5. renesas electronics products are classified according to the following two quality grades: ?standard? and ?high quality?. t he recommended applications for each renesas electronics product depends on the product?s quality grade, as i ndicated below. ?standard?: computers; office equipmen t; communications e quipment; test and measurement equipment; audio and visual equipment; home electronic a ppliances; machine tools; pe rsonal electronic equipment; and industrial robots etc. ?high quality?: transportation equipment (automobiles, trains, ship s, etc.); traffic control syst ems; anti-disaster systems; an ti- crime systems; and safety equipment etc. renesas electronics products are ne ither intended nor authorized for use in products or systems that may pose a direct threat t o human life or bodily injury (artificial life support devices or systems, surgical impl antations etc.), or may cause serious pro perty damages (nuclear reactor control systems, military equipment etc.). you must check the quality grade of each renesas electronics product before using it in a particular application. you may not use any renesas electronics product for any application for which it is not intended. renesas electronics shall not be in any way liable for any damages or losses incurre d by you or third parties arising from the use of any renesas el ectronics product for which the pr oduct is not intended by renesa s electronics. 6. you should use the renesas electronics pr oducts described in this document within the range specified by renesas electronics , especially with respect to the maximum ra ting, operating supply voltage range, movement power volta ge range, heat radiation characteristics, installation and other product characteristics. renesas electronics shall have no liability for malfunctions or damages arising out of the use of renesas electronics products beyond such specified ranges. 7. although renesas electronics endeavors to improve the quality and reliability of its produc ts, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate a nd malfunctions under certain use conditions. fu rther, renesas electronics products are not subject to radiation resistance design. please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a ren esas electronics product, such as safety desi gn for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradati on or any other appropriate meas ures. because the evaluation of microcomputer software alone is very di fficult, please evaluate the safety of th e final products or systems manufactured by you. 8. please contact a renesas electronics sales office for details as to environmental matters such as the environmental compatib ility of each renesas electronics product. please use renesas electronics products in compliance with all a pplicable laws and regulations that regulate the inclusion or use of controlled subs tances, including wit hout limitation, the eu rohs directive. renesas electronics assumes no liability for damages or losses oc curring as a result of your noncompliance with applicable laws and regulations. 9. renesas electronics products and technol ogy may not be used for or incorporat ed into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign la ws or regulations. you should not use renesas electronics products or technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. when exporting the renesas electronics products or technology describe d in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. 10. it is the responsibility of the buyer or distributor of re nesas electronics products, who di stributes, disposes of, or othe rwise places the product with a third party, to notify such third part y in advance of the contents a nd conditions set forth in this document, renesas electronics assumes no responsibility for any losses incurred by you or third parties as a result of unauthorized use of renesa s electronics products. 11. this document may not be reproduced or duplicated in any fo rm, in whole or in part, without prior written consent of renesa s electronics. 12. please contact a renesa s electronics sales office if you have any questi ons regarding the informat ion contained in this doc ument or renesas electronics products, or if you have any other inquiries. (note 1) ?renesas electronics? as used in this document means renesas electronics corporation and also includes its majority- owned subsidiaries. (note 2) ?renesas electronics product(s)? means any product developed or manufactured by or for renesas electronics. (2012.4) ??????~??????notice? ? 1. ????????????? ?????????? ???? 2. ?????????????? ???????????? 3. ???????????????? ?????????????? ??????? 4. ???????????????? ??????????????? 5. ??????????????? ???? ?? ????????? ??? ? ??????????????? ??????????????? ??????????????????????? ???????????????y? ??????????? ???? 6. ????????????????? ??????????????? ?????? 7. ??????????????? ??????????????? ????????1????1???? ???????????? ?????? 8. ?????????????? ???????????? rohs ?? ????????? 9. ?????????????????? ??????????????? ?????????????? ?? 10. ????????????? ???????????? ?? 11. ?????????? 12. ????????????? ? 1 ???????? ? 2 ?????? 2012 4 ???? ?????1????cmos ? v il maxv ih min ?????????v il maxv ih min ???? ???? cmos ???????? ???1?cmos ????nmos ?cmos ???????????????? ???v dd gnd ???????? esd ? mos ?T???????? ???????? ????^????????? ??????y??????y?? ??????pw ?????? ????? ??mos ??????????mos ?? ??????/???????? ???? ?? / ? ?????????????????? ?????????????????? ???????? ?????/ ? ????? ?????/?????/?? ???????? ????????? cmos ? ?? ????????????? ? ? pd79f7023, 79f7024 ? ????????? pd79f7023, 79f7024 ??????????? 78k/0 ?? ? 2 pd79f7023, 79f7024 ?? ?? 78k/0 ? ?? ?? ? ? ? ? ? ? ? ? ? cpu ? ?? ? ?? ? ???????????? ? ??? ??? ???? ? ??? (<>) ?? ra78k0 ?? cc78k0 # pragma sfr ??? sfr ? ??? 78k/0 ???? ?? 78k/0 ??? (u12326e) ?? ??? ??? ( ????? ) ? ??? ? ?? ? ??? ?? ... b ? ... ? ... h ???????J?? ? ? pd79f7023, 79f7024 ?? ?? ? 78k/0 ? ?? ? u12326c 78k0/kx2 flash ( ) ??? u17739c 78k0/kx2 flash memory self programming user?s manual u17516e 78k0 microcontrollers self programming library type01 user?s manual u18274e ( ?? ) ? pg-fp5 flash memory programme r user's manual r20ut0008e qb-mini2 on-chip debug emulator with programming user's manual r20ut0449e qb-programmer programming gui operation u18527e ? ( ? ) ( ?? ) ? ? qb-mini2 on-chip debug emulator with programming user's manual r20ut0449e ? ???????? ? ( ) ? operation u17199e language u17198e ra78k0 ver.3.80 assembler package user?s manual ? 1 structured assembly language u17197e 78k0 assembler package ra78k0 ver.4.01 operating precautions (notification document) ? 1 zud-cd-07-0181-e operation u17201e cc78k0 ver.3.70 c compiler user?s manual ? 2 language u17200e 78k0 c compiler cc78k0 ver. 4.00 operating precautions (notification document) ? 2 zud-cd-07-0103-e id78k0-qb ver.2.94 integrated debugger user?s manual operation u18330e id78k0-qb ver.3.00 integrated debugger user?s manual operation u18492e pm plus ver.5.20 ? 3 user?s manual u16934e pm+ ver.6.30 ? 4 user?s manual u18416e ? 1. ??? ra78k0 ver.4.01 ???? pc ??78k0 ra78k0 ver.4.01 ? ???? ra78k0 ver.3.80 ??? 2. ??? cc78k0 ver.4.00 ???? pc ??78k0 c cc78k0 ver.4.00 ? ???? cc78k0 ver.3.70 ??? 3. pm plus ver.5.20 ? ra78k0 ver.3.80 ?? 4. pm+ ver.6.30 ? ra78k0 ver.4.01 ????? ( , c , ?) ? ? semiconductor package mount manual ? quality grades on nec semiconductor devices c11531e guide to prevent damage for semiconductor devi ces by electrostatic discharge (esd) c11892e semiconductor reliability handbook r51zz0001e ? ??????? http://cn.renesas.com/products/package/manual/index.jsp ? ???????? ?????? ????????? eeprom ???? superflash silicon storage technology, inc. ?????? ? : ??? silicon storage technology, inc. ? superflash ? ?? ? .............................................................................................................................. ................. 1 1.1 ? ................................................................................................................................................... 1 1.2 ? ........................................................................................................................................... 2 1.3 ( ? ) ............................................................................................................................. 3 1.4 ? ................................................................................................................................................... 4 1.5 ? ........................................................................................................................................... 5 ? ? ........................................................................................................................................... 6 2.1 ?? ........................................................................................................................................ 6 2.2 ? .................................................................................................................................... 9 2.2.1 p20 p27 ( ? 2)........................................................................................................................... 9 2.2.2 p30 p34 ( ? 3)........................................................................................................................... 9 2.2.3 p121 p122 p125 ( ? 12)......................................................................................................... 10 2.2.4 avref vdd vss ...................................................................................................................... 11 2.2.5 regc.................................................................................................................... .......................... 11 2.3 i/o ??? ................................................................................... 13 cpu ? ............................................................................................................................... ........ 16 3.1 ? ............................................................................................................................... ........ 16 3.1.1 ?? ........................................................................................................................ 19 3.1.2 ??? ........................................................................................................................ 21 3.1.3 ???(sfr special function register) .................................................................. 21 3.1.4 ??? ............................................................................................................................... 22 3.2 ? .............................................................................................................................. 2 4 3.2.1 ?? ............................................................................................................................... ....... 24 3.2.2 ?? ............................................................................................................................... ....... 28 3.2.3 ???sfr special function register ..................................................................... 29 3.3 ???? .................................................................................................................................. 34 3.3.1 ?? ............................................................................................................................... ........... 34 3.3.2 ?? ............................................................................................................................... ........... 35 3.3.3 ?? ............................................................................................................................... ....... 36 3.3.4 ??? ............................................................................................................................... ....... 37 3.4 ??? .............................................................................................................................. 3 7 3.4.1 ?? ............................................................................................................................... ........... 37 3.4.2 ??? ............................................................................................................................... ....... 38 3.4.3 ??? ............................................................................................................................... ........... 39 3.4.4 ??? ............................................................................................................................... ....... 40 3.4.5 ???(sfr)?? .............................................................................................................. 41 3.4.6 ??? ............................................................................................................................... 42 3.4.7 ??? ............................................................................................................................... ........... 43 3.4.8 ????? ............................................................................................................................... .... 44 3.4.9 ??? ............................................................................................................................... ........... 45 ?? ............................................................................................................................... .......... 46 ??-1 4.1 ?? ............................................................................................................................... .......... 46 4.2 ? ............................................................................................................................... .......... 48 4.2.1 ? 2 .............................................................................................................................. ................ 49 4.2.2 ? 3 ............................................................................................................................. ................. 59 4.2.3 ? 12 ............................................................................................................................. ............... 65 4.3 ???? ....................................................................................................................... 68 4.4 ??? .................................................................................................................................. 72 4.4.1 i/o ? ............................................................................................................................... .... 72 4.4.2 ? i/o ? ............................................................................................................................... .... 72 4.4.3 i/o ? ............................................................................................................................... .... 72 4.5 ??????? ................................................................. 73 4.6 ??? n(pn)1 ?? .................................................................................... 75 ?? ............................................................................................................................... .. 76 5.1 ?? ........................................................................................................................... 76 5.2 ?? ....................................................................................................................... 77 5.3 ????? ............................................................................................................ 79 5.4 ????? ........................................................................................................................... 87 5.4.1 x1 ?? ............................................................................................................................... ..... 87 5.4.2 ??? ............................................................................................................................ 89 5.4.3 ??? ............................................................................................................................ 89 5.4.4 ?? ............................................................................................................................... ........... 89 5.5 ?? ........................................................................................................................... 90 5.6 ? ............................................................................................................................... .......... 93 5.6.1 ????? .................................................................................................................... 93 5.6.2 ??? ............................................................................................................. 96 5.6.3 ??? ............................................................................................................. 99 5.6.4 cpu ?? .......................................................................................................... 100 5.6.5 cpu ????? ..................................................................................................................... 101 5.6.6 cpu ??? ............................................................................................ 104 5.6.7 ???? ............................................................................................................... 105 5.6.8 ???? .................................................................................................................. 106 5.6.9 ??? .......................................................................................................................... 106 16 ? / ? 00 ......................................................................................................... 107 6.1 16 ? / ? 00 .................................................................................................. 107 6.2 16 ? / ? 00 .................................................................................................. 108 6.3 16 ? / ? 00 ??? ................................................................................... 114 6.4 16 ? / ? 00 .................................................................................................. 122 6.4.1 ? ............................................................................................................................. 12 2 6.4.2 ............................................................................................................................... .. 125 6.4.3 ?? ...................................................................................................................... 128 6.4.4 ? ti000 ??? ........................................................................... 132 6.4.5 ? ...................................................................................................................... 145 6.4.6 ppg ............................................................................................................................... 154 6.4.7 ............................................................................................................................. 15 8 6.4.8 ? .......................................................................................................................... 163 6.5 tm00 ? ............................................................................................................................. 17 1 6.5.1 tm00 ? cr010 ...................................................................................................... 171 ??-2 6.5.2 lvs00 lvr00 ............................................................................................................... 171 6.6 16 ? / ? 00 ? ........................................................................................... 173 8 ? / ? 51 ........................................................................................................... 178 7.1 8 ? / ? 51 .................................................................................................... 178 7.2 8 ? / ? 51 .................................................................................................... 179 7.3 8 ? / ? 51 ?? ......................................................................................... 181 7.4 8 ? / ? 51 ? ................................................................................................ 183 7.4.1 ? ............................................................................................................................. 18 3 7.4.2 ?? ...................................................................................................................... 185 7.4.3 ............................................................................................................................... .. 186 7.4.4 pwm .............................................................................................................................. 1 87 7.5 8 ? / ? 51 ? ............................................................................................. 191 ? 8 ? h1 ............................................................................................................................ .. 192 8.1 8 ? h1 ...................................................................................................................... 192 8.2 8 ? h1 ...................................................................................................................... 192 8.3 ? 8 ? h1............................................................................................................ 195 8.4 8 ? h1 ...................................................................................................................... 199 8.4.1 ?/ .............................................................................................................. 199 8.4.2 pwm ............................................................................................................................. 20 2 8.4.3 ? ............................................................................................................................. 20 8 ? ?? ............................................................................................................................... 215 9.1 ?? ......................................................................................................................... 215 9.2 ?? ......................................................................................................................... 216 9.3 ???? .............................................................................................................. 217 9.4 ?? ......................................................................................................................... 218 9.4.1 ??? ............................................................................................................... 218 9.4.2 ??? ........................................................................................................ 219 9.4.3 ????? ................................................................................................. 220 ? a/d ? ............................................................................................................................... ..... 222 10.1 a/d ? .......................................................................................................................... 222 10.2 a/d ? .......................................................................................................................... 224 10.3 a/d ?? ....................................................................................................................... 226 10.4 a/d ? .......................................................................................................................... 233 10.4.1 a/d ? .................................................................................................................... 233 10.4.2 ?? .................................................................................................................... 235 10.4.3 a/d ??? .................................................................................................................... 236 10.5 a/d ?? ..................................................................................................... 238 10.6 ? a/d ?? ....................................................................................................... 240 ?? ? ............................................................................................................................... 244 11.1 ? .......................................................................................................................... 244 11.2 ? .......................................................................................................................... 245 11.3 ????? ............................................................................................................ 246 11.4 ? .......................................................................................................................... 250 ??-3 ? ? ............................................................................................................................... ......... 251 12.1 ? ............................................................................................................................... ... 251 12.2 ? ............................................................................................................................... ... 251 12.3 ??? ....................................................................................................................... 252 12.4 ? ............................................................................................................................... ... 256 12.4.1 ?(???? ).............................................................................. 256 12.4.2 ? ( ?? cmpcom ? )........................................................... 257 12.4.3 ??? ........................................................................................................................... 257 ? ? uart0...................................................................................................................... 258 13.1 ? uart0 ................................................................................................................ 258 13.2 ? uart0 ................................................................................................................ 259 13.3 ??? uart0 ...................................................................................................... 262 13.4 ? uart0 ................................................................................................................ 267 13.4.1 ???? ............................................................................................................................... 267 13.4.2 ??(uart) ?? ........................................................................................................... 268 13.4.3 ?? ........................................................................................................................ 274 13.4.4 ? ............................................................................................................................... ... 275 ? ? ............................................................................................................................... .... 279 14.1 ? .............................................................................................................................. 2 79 14.2 ? .............................................................................................................................. 2 79 14.3 ?? ................................................................................................................... 284 14.4 ? .............................................................................................................................. 2 91 14.4.1 ? ........................................................................................................................... 291 14.4.2 ? ........................................................................................................................ 294 14.4.3 ? ............................................................................................................................... 294 14.4.4 ............................................................................................................................... 297 ? ............................................................................................................................... .. 298 15.1 ? .......................................................................................................................... 298 15.1.1 ............................................................................................................................... ....... 298 15.1.2 ?? .................................................................................................................... 299 15.2 ? ............................................................................................................................... . 302 15.2.1 halt ?? ............................................................................................................................... .... 302 15.2.2 stop ?? ............................................................................................................................... ... 306 ? ............................................................................................................................... ..... 313 16.1 ????? .................................................................................................................. 321 ? ? ............................................................................................................................. 32 2 17.1 ? ....................................................................................................................... 322 17.2 ? ................................................................................................................... 323 17.3 ? ....................................................................................................................... 323 17.4 ?? ................................................................................................................ 326 ? ?? ......................................................................................................................... 328 ??-4 18.1 ?? ................................................................................................................... 328 18.2 ?? ....................................................................................................................... 329 18.3 ???? ............................................................................................................ 330 18.4 ?? ................................................................................................................... 333 18.4.1 ? ............................................................................................................................... ....... 334 18.4.2 ............................................................................................................................... ....... 337 18.5 ??? ................................................................................................................ 340 ? ? ............................................................................................................................... ........ 343 19.1 ? ............................................................................................................................... ... 343 19.2 ?? ....................................................................................................................... 343 19.3 ?? .......................................................................................................................... 344 ?? ?? ............................................................................................................................... .... 345 20.1 ??? .............................................................................................................................. 3 45 20.2 ???? .............................................................................................................................. 3 46 ??? ............................................................................................................................... ........ 351 21.1 ?? ................................................................................................................... 351 21.2 ?? ..................................................................................................... 352 21.3 ? ............................................................................................................................... ...... 353 21.4 .............................................................................................................................. 3 54 21.4.1 tool ............................................................................................................................... ... 354 21.4.2 reset ............................................................................................................................... . 355 21.4.3 ? ............................................................................................................................... ....... 355 21.4.4 regc ............................................................................................................................... ... 355 21.4.5 ? ............................................................................................................................... 355 21.4.6 ? ............................................................................................................................... .............. 355 21.4.7 ?/ ??? .............................................................................................. 356 21.5 ? ............................................................................................................................... ...... 357 21.5.1 ............................................................................................................................... ....... 357 21.5.2 ?? ............................................................................................................................... 357 21.5.3 ? ............................................................................................................................... ....... 357 21.6 ? ............................................................................................................................... ...... 359 21.7 ??? ............................................................................................................ 361 21.7.1 ????? ................................................................................................................ 362 21.7.2 ?(? )....................................................................................................... 362 21.7.3 ............................................................................................................................... 364 ?? on-chip ? ............................................................................................................... 366 22.1 qb-mini2 pd79f7023, 79f7024 ............................................................................. 366 22.2 on-chip ?? id .................................................................................................................. 369 22.3 ?? .............................................................................................................................. 3 70 ?? ?? ............................................................................................................................... .... 371 23.1 ? ............................................................................................................................... ... 371 23.1.1 ?? ................................................................................................................ 371 23.1.2 ............................................................................................................................... ... 372 ??-5 23.1.3 ? ........................................................................................................................... 372 23.2 ............................................................................................................................... .......... 373 23.3 ??? ................................................................................................................ 381 ?? ............................................................................................................................... .... 384 ?? ??? ........................................................................................................................... 403 ?? ? ........................................................................................................................ 404 26.1 ? .............................................................................................................................. 4 04 26.2 ?? ................................................................................................................... 405 ? a ............................................................................................................................... ........ 406 a.1 ............................................................................................................................... ........... 408 a.2 ? ............................................................................................................................... 408 a.3 ? ........................................................................................................................ 409 a.3.1 ? pg-fp5 fl-p r5 ............................................................................................. 409 a.3.2 ?t?????? qb-mini 2............................................................................ 409 a.4 ??? ........................................................................................................................ 410 a.5 ?? ........................................................................................................................ 410 ?? .............................................................................................................................. ......................... i ??-6 r01uh0312cj0110 rev.1.10 1 2013.11.29 r01uh0312cj0110 rev.1.10 2013.11.29 pd79f7023, 79f7024 ? ? 1.1 ? { 78k0 cpu ? { i/o ??rom ram ? ? i/o ? ( ) ? ( ? ram) pd79f7023 8 kb 512 ? pd79f7024 16 (cmos i/o 13 cmos ? 3) 16 kb 768 ? { ? ? ??? 140 a ( ? ) (v dd = 3.0 v f cpu = 1 mhz ) ? stop ?? 2.0 a ( ?) (v dd = 5.0 v ) { ? ? ??? ? ??? - ?/ 1 10 mhz - ??? 1 10 mhz - ? 4 mhz 3 % (t a = ? 40 85 c) 4 mhz 2 % (t a = ? 20 70 c) ? ?? 240 khz 10 % ? ?????? { ? (poc) { ??? (lvi) ( ????/ ?) ? ?? 2.7 4.24v ? 11 ? { ? ? ? ? ? ? ( flash ??) { ? ? ? cpu ???? ? ?????????? ? ? lvi ??? ? ?????????? ? ??? ? ?????? pd79f7023, 79f7024 ? { ? ? 16 ?/ ? ? ppg ???? ? 8 ? h ? pwm ???? ? 8 ?/ ? 5 ? ?? ? ?? ? ???? ? ? 16 ?/ ? 8 ? ?? pd79f7023 pd79f7024 1 ? ? h1 ? ? 5 1 ? 1 ? { ? ? uart ? ? 2 ?? ? ? uart pd79f7023 pd79f7024 1 ? { 8 ? a/d ?5 ? { ?2 ? { ?1 ? { on-chip ? ? ???? { ?? c { ? ??(minicube2) { ??v dd = 2.7 5.5 v { ??t a = ?40 +85 c 1.2 ? ? ? rom ram ? 8 kb 512 b pd79f7023mc-caa-ax 20 20 ? ssop (7.62 mm (300)) 16 kb 768 b ?? ( ?? ni/pd/au ??) pd79f7024mc-caa-ax ? ???? r01uh0312cj0110 rev.1.10 2 2013.11.29 pd79f7023, 79f7024 ? 1.3 ( ?) 18 17 16 20 19 15 14 13 12 11 av ref p25/amp1- regc 1 2 3 4 5 6 7 8 9 10 p32/rxd0/cmpin p30/toh1/ti51/intp0 reset/p125 p121/x1/toolc0 p122/x2/exclk/toold0 p31/txd0/cmpcom p27/amp1+ ani4/p24 ani0/p20/amp0- ani1/p21/amp0out p33/ti000/intp1 p34/to00/ti010/cmpout ani2/p22/amp0+ ani3/p23 p26/ampout1 v dd v ss amp0-, amp0+, ? p30 p34 ? 3 amp1-, amp1+ p121, p122, p125 ? 12 amp0out, amp1out ? regc ? ani0 ani4 ? reset av ref ?? rxd0 ti000, ti010, ti51 ? cmpcom ? to00, toh1 ? toolc0 ? cmpin ? toold0 / cmpout ? txd0 exclk ?? v dd ? ( ??? ) v ss ? intp0, intp1 ? x1, x2 ( ??? ) p20 p27 ? 2 ? 1. v ss ? a/d ????? v ss ?? gnd (= 0 v) ? 2. ? regc v ss (0.47 1 f) 3. ani0/p20/amp0- ani1/p21/amp0out ani2/p22/amp0+ ani3/p23 ani4/p24 p31/txd0/cmpcom p32/rxd0/cmpin ???? 4. reset/p125 ??? r01uh0312cj0110 rev.1.10 3 2013.11.29 pd79f7023, 79f7024 ? 1.4 ? power on clear/ low voltage indicator poc/lvi control reset control system control reset/p125 x1/p121 x2/exclk/p122 interrupt control internal high-speed ram 78k/0 cpu core flash memory 8-bit timer h1 toh1/p30 8-bit timer 51 watchdog timer 16-bit timer/ event counter 00 ti000/p33 rxd0/p32 ti51/p30 txd0/p31 serial interface uart0 on-chip debug internal high-speed oscillator internal low-speed oscillator port 2 p20-p27 8 port 12 port 3 p30-p34 5 p121, p122 2 operational amplifier 0 amp0+/p22 amp0-/p20 amp0out/p21 operational amplifier 1 amp1+/p27 amp1-/p25 amp1out/p26 comparator cmpout/p34 cmpcom/p31 cmpin/p32 5 a/d converter av ref ani0/p20-ani4/p24 toolc0/x1 p125 toold0/x2 to00/ti010/p34 intp0/p30, intp1/p33 2 voltage regulator regc v ss v dd ? 1. v ss ? a/d ????? v ss ?? gnd (= 0 v) ? 2. ? regc v ss (0.47 1 f) 3. ani0/p20/amp0- ani1/p21/amp0out/pgain ani2/p22/amp0+ ani3/p23 ani4/p24 ???? 4. reset/p125 ??? r01uh0312cj0110 rev.1.10 4 2013.11.29 pd79f7023, 79f7024 ? 1.5 ? ? pd79f7023 pd79f7024 ??? 8 kb 16 kb ? ram 512 ? 768 ? ? 64 kb ?? ?/ ? ?? 1 10 mhz v dd = 2.7 5.5 v js ? 4 mhz 3 % (t a = ? 40 85 c), 4 mhz 2 % (t a = ? 20 70 c) js ? 240 khz 10 % ?? 8 32 ? (8 8 ? 4 ) ?? ? 8 , 16 ? / (8 8 , 16 8 ) ? ( ??? ) ? bcd i/o ? ( ? ) 16 cmos i/o 15 cmos 1 16 (tmo) 1 ?(ppg 1 ?? 2) 8 (tm5) 1 ? 8 (tmh) 1 ?pwm 1) n < ? (wdt) 1 ? ? uart 1 ? 8 a/d ? av ref = 2.7 5.5 v 5 ? ? ?? 2 ? (v dd = 2.2 5.5 v) ? 1 ? ? 3 ?? ? 8 ? ? reset ?? ? ????? ? ??? ? ????? on-chip ? ? ?? v dd = 2.7 5.5 v ? t a = ?40 +85 c ? 20 ? ssop (7.62 mm (300)) r01uh0312cj0110 rev.1.10 5 2013.11.29 pd79f7023, 79f7024 ? ? ? ? 2.1 ?? i/o ???av ref v dd ?????? 2-1. i/o ? ? ? av ref p20 p27 v dd p20 p27 r01uh0312cj0110 rev.1.10 6 2013.11.29 pd79f7023, 79f7024 ? ? (1) ?? i/o p20 ani0/amp0 - p21 ani1/amp0out p22 ani2/amp0+ p23 ani3 p24 ani4 p25 amp1 - p26 amp1out p27 i/o ? 2 8 i/o ? ? 1 ?? / ? amp1+ p30 ? toh1/ti51/intp0 p31 txd0/cmpcom p32 ? rxd0/cmpin p33 ti000/intp1 p34 i/o ? 3 5 i/o ? ? 1 ?? / ??? ? to00/ti010/cmpout p121 x1/toolc0 p122 i/o ? x2/exclk/toold0 p125 ? 12 p121,p122 ? 2 i/o ? p125 ? 1 ??? p125 ??? reset r01uh0312cj0110 rev.1.10 7 2013.11.29 pd79f7023, 79f7024 ? ? (2) ??? i/o ani0 p20/amp0 - ani1 p21/amp0out ani2 p22/amp0+ ani3 p23 ani4 a/d ?? ? p24 amp0- p20/ani0 amp0+ ? 0 p22/ani2 amp0out ? 0 ? p21/ani1 amp1- p25 amp1+ ? 1 p27 amp1out ? 1 ? p26 cmpcom ? p31/txd0 cmpin ? ? p32/rxd0 cmpout ? ? p34/to00/ti010 intp0 p30/toh1/ti51 intp1 ??????? ?? ? p33/ti000 regc ? ?? (1.9 v/2.5 v) ?? ? v ss (0.47 1 f) ? ? reset ?? p125 rxd0 uart0 ? p32/cmpin txd0 uart0 ? p31/cmpcom ti000 ?? 16 ? / ? 00 ?? 16 ?/ ? 00 ??? (cr000, cr010) p33/intp1 ti010 ?? 16 ?/ ? 00 ??? cr000 ? p34/to00/cmpout ti51 ?? 8 ? / ? 51 ? p30/toh1/intp0 to00 16 ?/ ? 00 ? p34/ti010/cmpout toh1 8 ? h1 ? p30/ti51/intp0 x1 p121/toolc0 x2 ? ??? ? p122/exclk/toold0 exclk ????? ? p122/x2/toold0 v dd ? 2 ? av ref ? a/d ????? 2 a/d ? ? ? ? v ss ? ?? ? ? toolc0 /on-chip ?? p121/x1 toold0 i/o /on-chip i/o ? p122/x2/exclk r01uh0312cj0110 rev.1.10 8 2013.11.29 pd79f7023, 79f7024 ? ? 2.2 ? 2.2.1 p20 p27 ( ? 2) p20 p27 i/o ??? a/d ???? i/o ? 1 ???? (1) ??? p20 p27 i/o ???????? 2(pm2) ? 1 ?????? (2) ?? p20 p27 a/d ??? i/o (a) ani0 ani4 a/d ????? 10.6 ? a/d ?? (5)ani0/p20 ani4/p24 (b) amp0+, amp0- ? 0 ? (c) amp0out ? 0 ? (d) amp1+, amp1- ? 1 ? (e) amp1out ? 1 ? ? anio/p20 ani4/p24 ????? 2.2.2 p30 p34 ( ? 3) p30 p34 i/o ?????? i/o??? i/o i/o ? ? 1 ???? (1) ??? p30 p34 i/o ???????? 3(pm3) ? 1 ??????? ?? 3 pu3) ? (2) ?? p30 p34 ??? i/o? i/o ??? i/o? i/o (a) intp0, intp1 ????????? r01uh0312cj0110 rev.1.10 9 2013.11.29 pd79f7023, 79f7024 ? ? (b) ti000 16 ?/ ? 00 ??? 16 ?/ ? 00 ??? (cr000, cr010) ???? (c) ti010 16 ?/ ? 00 ??? (cr000) ???? (d) to00 16 ?/ ? 00 ?? (e) ti51 8 ?/ ? 51 ??? (f) toh1 8 ? h1 ?? (g) rxd0 ? uart0 ?? (h) txd0 ? uart0 ?? (i) cmpcom ?? (j) cmpin ?? (k) cmpout ?? 2.2.3 p121 p122 p125 ( ? 12) p121 p122 ? i/o ?? p125 ??????????????? ??????/on-chip ?? i/o ?? p125/reset ????????(rsrmask) 5(rstm) 1 ?? rstm ? ? 1 ???? (1) ??? p121 p122 p125 ? i/o ???????? 12(pm12) ? p120 p125 ??? p125 ??? 12(pu12) ? (2) ?? p121 p122 p125 ?????????????? flash /on-chip ?? i/o ?? r01uh0312cj0110 rev.1.10 10 2013.11.29 pd79f7023, 79f7024 ? ? (a) x1, x2 ????? (b) exclk ??????? (c) reset ???? 2013.11.29 (d) toolc0 /on-chip ??? (e) toold0 /on-chhip ? i/o ? ? reset/p125 ??? ???????? ????? ? ? toolc0/x1 toold0/x2 flash ?, ??? ? toolc0/x1 toold0/x2 on-chip ???? on-chip ? 2.2.4 av ref v dd v ss ??? (a) av ref a/d ????? 2 a/d ??? ?a/d ????v dd ? ? ? 2 ????? av ref ? v dd ?? (b) v dd v dd ??? (c) v ss v ss ??? ? ? v ss P a/d ?????? v ss ?? gnd (= 0 v) ? 2.2.5 regc ????? r01uh0312cj0110 rev.1.10 11 pd79f7023, 79f7024 ? ? (a) regc ??(1.9 v/2.5 v) ????? v ss ???? ???? stop ????? 0.47 f ???????? regc v ss ? ?????? r01uh0312cj0110 rev.1.10 12 2013.11.29 pd79f7023, 79f7024 ? ? 2.3 i/o ??? i/o ??? 2-1 ? i/o ? 2-1 2-2. i/o i/o i/o ???? ani0/p20/amp0- 11-p ani1/p21/amp0out 11-s ani2/p22/amp0+ 11-n ani3/p23 ani4/p24 11-g p25/amp1- 11-p p26/amp1out 11-s p27/amp1+ 11-n < > ?? av ref v ss < ? > ??? ? 1 p30/toh1/ti51/intp0 5-ah ? ?? v dd v ss ??? p31/txd0/cmpcom 5-bd p32/rxd0/cmpin 5-bb < > ?? av ref v ss < ? > ??? ? 1 p33/ti000/intp1 p34/to00/ti010/cmpout 5-ah p121/x1/toolc0 ? 2 p122/x2/exclk/toold0 ? 2 37 (h) i/o ? ?? v dd v ss ??? reset/p125 42-b ??? v dd av ref ? v dd . ? 1. ???????? 2. ?????? 5-2 ?????? (oscctl) ?? ? ? 1. ani0/p20/amp0- ani1/p21/amp0out ani2/p22/amp0+ ani3/p23ani4/p24 ?? ?? 2. reset/p125 ??? ???????? ???? r01uh0312cj0110 rev.1.10 13 2013.11.29 pd79f7023, 79f7024 ? ? ? 2-2. i/o (1/2) 5-ah 11-ah pullup enable data output disable input enable v dd p-ch v dd p-ch in/out n -ch data output disable av ref p-ch in/out n-ch p-ch n-ch input enable + _ v ss v ss av ref (threshold voltage) comparator 5-ah 11-ah pullup enable data comparator output disable input enable v dd p-ch v dd p-ch in/out n -ch v ss data output disable av ref p-ch in/out n-ch p-ch n-ch input enable + _ v ss v ss + _ op amp (threshold voltage) comparator av ref 5-ah pullup enable data output disable input enable v dd p-ch v dd p-ch in/out n -ch v ss comparator r01uh0312cj0110 rev.1.10 14 2013.11.29 pd79f7023, 79f7024 ? ? ? 2-2. i/o (2/2) 11-ah 37-ah data output disable av ref p-ch in/out n-ch p-ch n-ch comparator input enable + _ v ss v ss + _ op amp av ref (threshold voltage) data output disable input enable v dd p-ch x1 n -ch v ss reset data output disable input enable v dd p-ch n -ch v ss reset p-ch n-ch x2 11-ah 42-ah data output disable av ref p-ch in/out n-ch p-ch n-ch input enable + _ v ss v ss + _ op amp (threshold voltage) comparator av ref in pullup enable v dd p-ch reset mask reset input enable schmit r01uh0312cj0110 rev.1.10 15 2013.11.29 pd79f7023, 79f7024 cpu ? cpu ? 3.1 ? pd79f7023 79f7024 ?? 64kb ????? 3-1 3-2 ? ? ?? rom ???????? 3-1. ? (ims) ? ? ims rom ? ram pd79f7023 42h 8 kb 512 ? pd79f7024 04h 16 kb 768 ? r01uh0312cj0110 rev.1.10 16 2013.11.29 pd79f7023, 79f7024 cpu ? ? 3-1. ?? ( pd79f7023) ffffh ff00h feffh general-purpose registers 32 8 bits special function registers (sfr) 256 8 bits fee0h fedfh internal high-speed ram 512 8 bits fd00h fcffh data memory space reserved program memory space 2000h 1fffh 0000h flash memory 8192 8 bits vector table area 64 8 bits callt table area 64 8 bits option byte area note 1 5 8 bits on-chip debug security id setting area note 1 10 8 bits 0800h 07ffh 0040h 003fh 0000h 0085h 0084h 0080h 007fh 008fh 008eh program area 1905 8 bits boot cluster 0 note 2 boot cluster 1 1fffh 1fffh 1000h 0fffh 1080h 107fh 1085h 1084h 108fh 108eh program area on-chip debug security id setting area note 1 10 8 bits option byte area note 1 5 8 bits callf entry area 2048 8 bits program area ? 1. ??: 0080h 0084h ???? 0085h 008eh ? on-chip ?? id ??: 0080h 0084h ? 1080h 1084h ???? 0085h 008eh ? 1085h 108eh ? on-chip ?? id 2. ??, ??? 0 ( 21.6 ? ) ? ???(1 =1kb) ?????? 3-2 ????? block 00h block 01h block 07h 1 kb 1fffh 07ffh 0800h 0000h 0400h 03ffh 1c00h 1bffh r01uh0312cj0110 rev.1.10 17 2013.11.29 pd79f7023, 79f7024 cpu ? ? 3-2. ?? ( pd79f7024) data memory space special function registers (sfr) 256 8 bits general-purpose registers 32 8 bits internal high-speed ram 768 8 bits reserved flash memory 16384 8 bits program memory space 0000h 4000h 3fffh fc00h fbffh fee0h fedfh ff00h feffh ffffh 3fffh program area 1905 8 bits program area on-chip debug security id setting area note 1 10 8 bits option byte area note 1 5 8 bits callf entry area 2048 8 bits program area 0800h 07ffh 1000h 0fffh 1080h 107fh 1085h 1084h 108fh 108eh boot cluster 1 vector table area 64 8 bits callt table area 64 8 bits option byte area note 1 5 8 bits on-chip debug security id setting area note 1 10 8 bits 0040h 003fh 0000h 0085h 0084h 0080h 007fh 008fh 008eh 1fffh boot cluster 0 note 2 ? 1 ?? : 0080h 0084h ???? 0085h 008eh ? on-chip ?? id ??: 0080h 0084h ? 1080h 1084h ???? 0085h 008eh ? 1085h 108eh ? on-chip ?? id 2 ??, ??? 0 ( 21.6 ? ) ? ???(1 =1kb) ?????? 3-2 ????? block 00h block 01h block 0fh 1 kb 3fffh 07ffh 0000h 0400h 03ffh 3c00h 3bffh 0800h r01uh0312cj0110 rev.1.10 18 2013.11.29 pd79f7023, 79f7024 cpu ? ?????? 3-2. ????? ?? 0000h 03ffh 00h 0400h 07ffh 01h 0800h 0bffh 02h 0c00h 0fffh 03h 1000h 13ffh 04h 1400h 17ffh 05h 1800h 1bffh 06h 1c00h 1fffh 07h 2000h 23ffh 08h 2400h 27ffh 09h 2800h 2bffh 0ah 2c00h 2fffh 0bh 3000h 33ffh 0ch 3400h 37ffh 0dh 3800h 3bffh 0eh 3c00h 3fffh 0fh ? pd79f7023: 00h 07h pd79f7024: 00h 0fh 3.1.1 ?? ???????(pc) ?? pd79f7023 79f7024 ?? rom()? 3-3. ? rom ? rom ? ? pd79f7023 8192 8 (0000h 1fffh) pd79f7024 16384 8 (0000h 3fffh) r01uh0312cj0110 rev.1.10 19 2013.11.29 pd79f7023, 79f7024 cpu ? ??? (1) 0000h 003fh 64 ??????? ?? 16 ? 8 ?? 8 ? 3-4. ? ? 0000h reset ? poc lvi wdt 0004h intlvi 0006h intp0 0008h intp1 000ah intcmp 0014h intsr0 0016h intst0 001ah inttmh1 0020h inttm000 0022h inttm010 0024h intad 002ah inttm51 003eh brk (2) callt ? 0040h 007fh 64 ???? 1 ???(callt) ??? (3) ?? 0080h 0084h 1080h 1084h ? 5 ??????? 0080h 0084h ????? 0080h 0084h 1080h 1084h ?????? ?? (4) on-chip ?? id 0085h 008eh 1085h 108eh ? 10 ?? on-chip ?? id ????? 0085h 008eh 10 ?? on-chip ?? id ?? 0085h 008eh 1085h 108eh 10 ?? on-chip ?? id ??? on-chip ? (5) callt ? 0800h 0fffh ?? 2 ???? (callf) ??? r01uh0312cj0110 rev.1.10 20 2013.11.29 pd79f7023, 79f7024 cpu ? 3.1.2 ??? pd79f7023 79f7024 ram (1) ? ram 3-5. ? ram ? ? ram pd79f7023 512 8 (fd00h feffh) pd79f7024 768 8 (fc00h feffh) fee0h feffh 32 ? 4 ??? 8 ? 8 ??? ??? ??? ram 3.1.3 ??? (sfr special function register) on-chip ???? (sfr) ff00h ffffh ( 3.2.3 ??? (sfr special function register ? 3-6 ??? ) ? ? sfrs ?? r01uh0312cj0110 rev.1.10 21 2013.11.29 pd79f7023, 79f7024 cpu ? 3.1.4 ??? ?????????????????? pd79f7023 79f7024 ???????????????? ?????(sfr)?????????? 3-3 3-4 ? ???? 3.4 ??? ? 3-3. ?????? ( pd79f7023) flash memory 8192 8 bits 2000h 1fffh 0000h ffffh ff00h feffh fd00h fcffh fe20h fe1fh fee0h fedfh ff20h ff1fh internal high-speed ram 512 8 bits general-purpose registers 32 8 bits special function registers (sfr) 256 8 bits sfr addressing register addressing short direct addressing direct addressing register indirect addressing based addressing based indexed addressing reserved r01uh0312cj0110 rev.1.10 22 2013.11.29 pd79f7023, 79f7024 cpu ? ? 3-4. ?????? ( pd79f7024) sfr addressing direct addressing register indirect addressing based addressing based indexed addressing special function registers (sfr) 256 x 8 bits internal high-speed ram 768 x 8 bits general-purpose registers 32 x 8 bits reserved flash memory 16384 x 8 bits ffffh ff00h feffh fee0h fedfh fc00h fbffh 4000h 3fffh 0000h ff20h ff1fh fe20h fe1fh register addressing short direct addressing r01uh0312cj0110 rev.1.10 23 2013.11.29 pd79f7023, 79f7024 cpu ? 3.2 ? pd79f7023 79f7024 ? 3.2.1 ?? ???????????? (pc) ?? (psw) ? ??(sp) (1) (pc) ? 16 ???????? ???(pc) ??????????? ???? 0000h 0001h ??? ? 3-5. ?? 15 pc pc15 pc14 pc13 pc12 pc11 pc10 pc9 pc8 pc7 pc6 pc5 pc4 pc3 pc2 pc1 pc0 0 (2) ?? (psw) ?? 8 ???????? ??? push psw ???????? retb reti pop psw ? ?????? ??????02h ? 3-6. ????? ie z rbs1 ac rbs0 isp cy 70 0 psw (a) ? (ie) ??? cpu ? ie ?? 0 ??? (di) ??? ie ?? 1 ?? (ei) ?????(isp) ????? ??? ? di ????? (0) ? ei ?????1 (b) ? (z) ? 0 ????1 ??(0) r01uh0312cj0110 rev.1.10 24 2013.11.29 pd79f7023, 79f7024 cpu ? (c) ??? (rbs0 rbs1) ? 4 ?? 2 ? ? 2 ??? sel rbn ?????^ (d) ? (ac) ? 3 ??? 3 ???? 1 ??h0 (e) ?? (isp) ??????? 0 ??????? (pr0l pr0h pr1l) ??? ( 14.3(3) ???? (pr0l pr0h pr1l)) ?(ie) ?? (f) ? (cy) ?????????????? (3) ?? sp) ??? 16 ???????? ram ?? ? 3-7. ???? 15 sp sp15 sp14 sp13 sp12 sp11 sp10 sp9 sp8 sp7 sp6 sp5 sp4 sp3 sp2 sp1 sp0 0 ()?????????(?)?????? ???/ ?? 3-8 3-9 ? ? ???? sp ???????? sp ? r01uh0312cj0110 rev.1.10 25 2013.11.29 pd79f7023, 79f7024 cpu ? ? 3-8. ?? (a) push rp ? (sp = fee0h ? ) register pair lower fee0h sp sp fee0h fedfh fedeh register pair higher fedeh (b) call,callf,callt ? (sp = fee0h ? ) pc15 to pc8 fee0h sp sp fee0h fedfh fedeh pc7 to pc0 fedeh (c) ? brk ? (sp = fee0h ? ) pc15 to pc8 psw fedfh fee0h sp sp fee0h fedeh feddh pc7 to pc0 feddh r01uh0312cj0110 rev.1.10 26 2013.11.29 pd79f7023, 79f7024 cpu ? ? 3-9. ??? (a) pop rp ? (sp = fedeh ? ) register pair lower fee0h sp sp fee0h fedfh fedeh register pair higher fedeh (b) ret ? (sp = fedeh ? ) pc15 to pc8 fee0h sp sp fee0h fedfh fedeh pc7 to pc0 fedeh (c) reti retb ? (sp = feddh ? ) pc15 to pc8 psw fedfh fee0h sp sp fee0h fedeh feddh pc7 to pc0 feddh r01uh0312cj0110 rev.1.10 27 2013.11.29 pd79f7023, 79f7024 cpu ? 3.2.2 ?? ???????(fee0h feffh) ?? 4 ? 8 ? 8 ? (x ac bed l h) ????? 8 ??? 16 ? (axbc de hl) ???? (x ac bed l h ax bc de hl) ? (r0 r7 rp0 rp3) cpu ? (sel rbn) ????^4 ???????? ??????? ? 3-10. ??? (a) register bank 0 register bank 1 register bank 2 register bank 3 feffh fef8h fee0h hl de bc ax h 15 0 7 0 l d e b c a x 16-bit processing 8-bit processing fef0h fee8h (b) register bank 0 register bank 1 register bank 2 register bank 3 feffh fef8h fee0h rp3 rp2 rp1 rp0 r7 15 0 7 0 r6 r5 r4 r3 r2 r1 r0 16-bit processing 8-bit processing fef0h fee8h r01uh0312cj0110 rev.1.10 28 2013.11.29 pd79f7023, 79f7024 cpu ? 3.2.3 ??? sfr special function register ???????? ??? ff00h ffffh ?? ?????????????? ??? 1 8 16 ??? ? 1 1 ?? (sfr.bit)???? ??? ? 8 8 ?? (sfr) ???? ??? ? 16 16 ?? (sfrp) ???? ?????? 3-6 ?????? ? ?????? ra78k0 ? cc78k0 ?? #pragma sfr ? sfr ra78k0 id78k0-qb ?????? ? r/w ?????/ r/w ?/ r ? w ? ? ?? ???(1 8 16) ? ??? ? ??????? r01uh0312cj0110 rev.1.10 29 2013.11.29 pd79f7023, 79f7024 cpu ? 3-6. ??? (1/4) ?? ? 7 6 5 4 3 2 1 0 r/w 1 8 16 ? ff00h ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ff01h ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ff02h p2 p27 p26 p25 p24 p23 p22 p21 p20 r/w ? 00h ff03h p3 0 0 0 p34 p33 p32 p31 p30 r/w ? 00h ff04h ff08h ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ff09h adcrh ? ? ? ? ? ? ? ? r ? ? 00h ff0ah rxb0 ? ? ? ? ? ? ? ? r ? ? ffh ff0bh txs0 ? ? ? ? ? ? ? ? r/w ? ? ffh ff0ch p12 0 0 p125 0 0 p122 p121 0 r/w ? 00h ff0dh ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ff0eh ads 0 0 0 0 0 pd79f7023, 79f7024 cpu ? 3-6. ??? (2/4) ?? ? 7 6 5 4 3 2 1 0 r/w 1 8 16 ? ff2bh fpctl 0 0 0 0 0 0 0 pd79f7023, 79f7024 cpu ? 3-6. ??? (3/4) ?? ? 7 6 5 4 3 2 1 0 r/w 1 8 16 ? ff70h tmhmd1 pd79f7023, 79f7024 cpu ? 3-6. ??? (4/4) ?? ? 7 6 5 4 3 2 1 0 r/w 1 8 16 ? ffach resf 0 0 0 wdtrf 0 0 0 lvirf r ? ? 00h note1 ffadh ffb0h ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ffb1h cr51 ? ? ? ? ? ? ? ? r/w ? ? 00h ffb2h tcl51 0 0 0 0 0 tcl512 tcl511 tcl510 r/w ? 00h ffb3h tmc51 pd79f7023, 79f7024 cpu ? 3.3 ???? ???? (pc) ????????? (pc) ?(?? +1) ????????(pc) ????? 78k/0 ? ?? ?? (u12326e)) 3.3.1 ?? [ ] ?? 8 ?jdisp8 ????? (pc) ??? ????? 2 ?? (? 128 +127) 7 ? ??????????? ? 128 +127 ?? ? br $addr16 ??????? [?? ] 15 0 pc + 15 0 876 s 15 0 pc jdisp8 when s = 0, all bits of are 0. when s = 1, all bits of are 1. pc indicates the start address of the instruction after the br instruction. ... r01uh0312cj0110 rev.1.10 34 2013.11.29 pd79f7023, 79f7024 cpu ? 3.3.2 ?? [ ] ?(pc) ???? ? call !addr16 br !addr16 callf !addr11 ????? call !addr16 br !addr16 ????? callf !addr11 ??? 0800h 0fffh [?? ] call !addr16 br !addr16 ?? 15 0 pc 87 70 call or br low addr. high addr. callf !addr11 ?? 15 0 pc 87 70 fa 10? 11 10 00001 643 callf fa 7? r01uh0312cj0110 rev.1.10 35 2013.11.29 pd79f7023, 79f7024 cpu ? 3.3.3 ?? [ ] ? 1 5 ????????? (pc) ?? ??? ? callt [addr5] ????? ?????? addr5 0040h 007fh ??????? [?? ] 15 1 15 0 pc 70 low addr. high addr. memory (table) effective address+1 effective address 01 00000000 87 87 65 0 0 1 11 765 10 ta 4? operation code 15 1 addr5 01 00000000 65 0 0 ta 4? ... the value of the effective address is the same as that of addr5. r01uh0312cj0110 rev.1.10 36 2013.11.29 pd79f7023, 79f7024 cpu ? 3.3.4 ??? [ ] ????(ax) ?(pc) ????? ? br ax ????? [?? ] 70 rp 07 ax 15 0 pc 87 3.4 ??? ?????????? 3.4.1 ?? [ ] ????(a ax) ??? pd79f7023 79f7024 ?????? ?? ? ????? mulu a ?? ax ?? divuw ax ??? adjba/adjbs a ???? ror4/rol4 a ?? [ ? ] ?????????? [ ??] mulu x ? ? 8 8 ????a ? x ??? ax ????? a ? ax ? r01uh0312cj0110 rev.1.10 37 2013.11.29 pd79f7023, 79f7024 cpu ? 3.4.2 ??? [ ] ??????????(rbs0 rbs1)????? ????? ?2???????? 8 ??? 3 ? 8 ?? 1 ? [ ? ] ? r x, a, c, b, e, d, l, h rp ax, bc, de, hl r rp (x, a, c, b, e, d, l, h, ax, bc, de hl) ?t(r0 r7 rp0 rp3) [ ??] mov a c ? c ?? r ? ? 0 1 1 0 0 0 1 0 ?? incw de ? de ?? rp ? ? 1 0 0 0 0 1 0 0 ?? r01uh0312cj0110 rev.1.10 38 2013.11.29 pd79f7023, 79f7024 cpu ? 3.4.3 ??? [ ] ????? ???? [ ? ] ? addr16 ? 16 [ ??] mov a !0fe00h !addr16 ? fe00h ? ? 1 0 0 0 1 1 1 0 op 0 0 0 0 0 0 0 0 00h 1 1 1 1 1 1 1 0 feh [?? ] memory 0 7 addr16 (lower) addr16 (upper) op code r01uh0312cj0110 rev.1.10 39 2013.11.29 pd79f7023, 79f7024 cpu ? 3.4.4 ??? [ ] ? 8 ?????? ??? fe20h ff1fh 256 ?? ram ??? (sfrs)?? fe20h feffh ff00h ff1fh ????(sfr) ff00h ff1fh ?????????/ ? ???????????????? 8 20h ffh ????? 8 ?0 00h 1fh ?? 8 ?1 [?? ] [ ? ] ? saddr ? fe20h ff1fh ? saddrp ? fe20h ff1fh ??? [ ??] lb1 equ 0fe30h lb1 fe30h : mov lb1 a lb1 ? saddr fe30h ? a ?????? ? 1 1 1 1 0 0 1 0 op 0 0 1 1 0 0 0 0 30h (s addr-offset) [?? ] 15 0 short direct memory effective address 1 111111 87 0 7 op code saddr-offset 8 ? 20h ffh ? = 0 8 ? 00h 1fh ? = 1 r01uh0312cj0110 rev.1.10 40 2013.11.29 pd79f7023, 79f7024 cpu ? 3.4.5 ??? (sfr) ?? [ ] ? 8 ????? (sfr)?? ??? ff00h ffcfh ffe0h ffffh 240 ????? ff00h ff1fh ?? ???????? [ ? ] ? sfr ??? sfrp 16 ??????? [ ??] mov pm0 a ? pm0 (ff20h) ? sfr ? ? 1 1 1 1 0 1 1 0 op 0 0 1 0 0 0 0 0 20h (sfr-offset) [ ?? ] 15 0 sfr effective address 1 111111 87 0 7 op code sfr-offset 1 r01uh0312cj0110 rev.1.10 41 2013.11.29 pd79f7023, 79f7024 cpu ? 3.4.6 ??? [ ] ?????????? (rbs0 rbs1) ??? ?????? ???? [ ? ] ? ? [de], [hl] [ ??] mov a[de] ?[de] ??? ? 1 0 0 0 0 1 0 1 [?? ] 16 0 8 d 7 e 0 7 7 0 a de the contents of the memory addressed are transferred. memory the memory address specified with the register pair de r01uh0312cj0110 rev.1.10 42 2013.11.29 pd79f7023, 79f7024 cpu ? 3.4.7 ??? [ ] 8 ???? hl ?????????? ?(rbs0 rbs1) ?? hl ????? 16 ??? 16 ?? ? ???? [ ? ] ? ? [hl + byte] [ ??] mov a[hl + 10h] ?? 10h ? ? 1 0 1 0 1 1 1 0 0 0 0 1 0 0 0 0 [?? ] 16 0 8 h 7 l 0 7 7 0 a hl the contents of the memory addressed are transferred. memory +10 r01uh0312cj0110 rev.1.10 43 2013.11.29 pd79f7023, 79f7024 cpu ? 3.4.8 ????? [ ] b c ???? hl ????????? ??(rbs0 rbs1) ?? hl ??? b c ?? 16 ?? ? 16 ???? ???? [ ? ] ? ? [hl + b] [hl + c] [ ??] mov a [hl +b] ? b ?? ? 1 0 1 0 1 0 1 1 [?? ] 16 0 h 78 l 0 7 b + 0 7 7 0 a hl the contents of the memory addressed are transferred. memory r01uh0312cj0110 rev.1.10 44 2013.11.29 pd79f7023, 79f7024 cpu ? 3.4.9 ??? [ ] ??(sp) ????? ? push pop ???????, ???? ???? ram [ ??] push de de ?? ? 1 0 1 1 0 1 0 1 [?? ] e fee0h sp sp fee0h fedfh fedeh d memory 0 7 fedeh r01uh0312cj0110 rev.1.10 45 2013.11.29 pd79f7023, 79f7024 ?? ?? 4.1 ?? ? i/o ???av ref v dd ?????? 4-1. i/o ? ? ? av ref p20 p27 v dd p20 p27 ? i/o ?, ?????? 4-2 ? i/o ??????????? ? r01uh0312cj0110 rev.1.10 46 2013.11.29 pd79f7023, 79f7024 ?? 4-2. ?? i/o ? p20 ani0/amp0 - p21 ani1/amp0out p22 ani2/amp0+ p23 ani3 p24 ani4 p25 amp1 - p26 amp1out p27 i/o ? 2 8 i/o ? ? 1 ?? / ? amp1+ p30 ? toh1/ti51/intp0 p31 txd0/cmpcom p32 ? rxd0/cmpin p33 ti000/intp1 p34 i/o ? 3 5 i/o ? ? 1 ?? / ??? ? to00/ti010/cmpout p121 x1/toolc0 p122 i/o ? x2/exclk/toold0 p125 ? 12 p121,p122 ? 2 i/o ? p125 ? 1 ??? p125 ??? reset r01uh0312cj0110 rev.1.10 47 2013.11.29 pd79f7023, 79f7024 ?? 4.2 ? ??? 4-3. ? ? ?? ???? (pmxx) pm2, pm3, pm12 ??? (pxx): p2, p3, p12 ?? (puxx): pu3, pu12 ??? (rstmask) a/d ?? (adpc) ? ?16 (cmos i/o:15 , cmos :1 ) ?6 r01uh0312cj0110 rev.1.10 48 2013.11.29 pd79f7023, 79f7024 ?? 4.2.1 ? 2 ? 2 ?? i/o ??????? 2(2pm), ? 1 ?????? ???? a/a ??? i/o ? p20/amp0-/ani0 p24/ani4 ??????(? 4-4 4-8 ) p20/amp0-/ani0 p24/ani4 ? av ref (p24/ani4 ) ??? p20/amp0-/ani0 p24/ani4 ? v ss (p24/ani4 )?? ???? 2 ??? ? 2 ???? 4-1 4-7 ? ? ? 2 ???? av ref v dd ?? 4-4. p20/ani0/amp0- p22/ani2/amp0+ ? adpc ? pm2 ? opamp0e ads ? (n = 0, 2) p20/ani0/amp0- p22/ani2/amp0+ ?anin ? ?? ? ?? anin ?anin ? i/o ? ?? ? ?? anin ?anin ?????? 0 ?? anin ??????? ?anin ?????? ? ?? 1 ?? anin ? 0 ?? ?? ? ? ? ? adpc: a/d ?? pm2: ???? 2 opamp0e: ???(ampm)? 7 ads: ???? r01uh0312cj0110 rev.1.10 49 2013.11.29 pd79f7023, 79f7024 ?? 4-5. p21/ani1/amp0out ?? adpc ? pm2 ? opamp0e ads ? p21/ani1/amp0out ?ani1 ? 0 ?? ani1 ?? 1 ? ? ?ani1 ? 0 ?? ani1 i/o ? ?? 1 ? ? ?ani1 ?????? 0 ?? ani1 ??????? ?ani1 ????? ?? 1 ?? ani1 ? 0 ???? ? i/o ? ?? ? ? ? 4-6. p23/ani3, p24/ani4 ? adpc ? pm2 ? ads ? (n = 3, 4) p23/ani3 p24/ani4 ?anin ? ?? ?? anin ?anin ? i/o ? ?? ?? anin ?anin ?????? ?? ?? anin ??????? ?? ?? ? ? ? adpc: a/d ?? pm2: ???? 2 opamp0e: ???(ampm)? 7 ads: ???? r01uh0312cj0110 rev.1.10 50 2013.11.29 pd79f7023, 79f7024 ?? 4-7. p25/amp1- p27/amp1+ ? adpc ? pm2 ? opamp1e p25/amp1- p27/amp1+ ?? ? i/o ? ?? ? 0 ?????? ?? 1 ? 1 ?? ?? ? ? 4-8. p26/amp1out ? adpc ? pm2 ? opamp1e p23/ani3 p24/ani4 ?? ? i/o ? ?? ? 0 ?????? ?? 1 ? 1 ?? ?? ? ? ? adpc: a/d ?? pm2: ???? 2 opamp0e: ???(ampm)? 7 r01uh0312cj0110 rev.1.10 51 2013.11.29 pd79f7023, 79f7024 ?? ? 4-1. p20 ??? internal bus p20/ani0/amp0- rd wr port wr pm output latch (p20) pm20 selector pm2 p2 a/d converter operational amplifier (-) input p2: ??? 2 pm2: ???? 2 rd: ?? wr : ? r01uh0312cj0110 rev.1.10 52 2013.11.29 pd79f7023, 79f7024 ?? ? 4-2. p21 ??? internal bus p21/ani1/amp0out rd wr port wr pm output latch (p21) pm21 selector pm2 p2 a/d converter operational amplifier output wr amp0m opamp0e ampm p2: ??? 2 pm2: ???? 2 rd: ?? wr : ? r01uh0312cj0110 rev.1.10 53 2013.11.29 pd79f7023, 79f7024 ?? ? 4-3. p22 ??? internal bus p22/ani2/amp0+ rd wr port wr pm output latch (p22) pm22 selector pm2 p2 a/d converter operational amplifier (+) input p2: ??? 2 pm2: ???? 2 rd: ?? wr : ? r01uh0312cj0110 rev.1.10 54 2013.11.29 pd79f7023, 79f7024 ?? ? 4-4. p23 p24 ??? internal bus p23/ani3, p24/ani4 rd wr port wr pm output latch (p23, p24) pm23, pm24 selector pm2 a/d converter p2 p2: ??? 2 pm2: ???? 2 rd: ?? wr : ? r01uh0312cj0110 rev.1.10 55 2013.11.29 pd79f7023, 79f7024 ?? ? 4-5. p25 ??? internal bus p25/amp1- rd wr port wr pm output latch (p25) pm25 selector pm2 p2 operational amplifier (-) input p2: ??? 2 pm2: ???? 2 rd: ?? wr : ? r01uh0312cj0110 rev.1.10 56 2013.11.29 pd79f7023, 79f7024 ?? ? 4-6. p26 ??? internal bus p26/amp1out rd wr port wr pm output latch (p26) pm26 selector pm2 p2 operational amplifier output wr amp0m opamp1e ampm p2: ??? 2 pm2: ???? 2 rd: ?? wr : ? r01uh0312cj0110 rev.1.10 57 2013.11.29 pd79f7023, 79f7024 ?? ? 4-7. p27 ??? internal bus p27/amp1+ rd wr port wr pm output latch (p27) pm27 selector pm2 p2 operational amplifier (+) input p2: ??? 2 pm2: ???? 2 rd: ?? wr : ? r01uh0312cj0110 rev.1.10 58 2013.11.29 pd79f7023, 79f7024 ?? 4.2.2 ? 3 ? 3 ?? i/o ??????? 3(pm3) ? 1 ?????? p30- p34 ????? 3(pu3) 1 ?? ?????? / ??????? ? ???? 3 ??? ? 3 ???? 4-8 4-12 ? r01uh0312cj0110 rev.1.10 59 2013.11.29 pd79f7023, 79f7024 ?? ? 4-8. p30 ??? p30/toh1/ti51/intp0 wr pu rd wr port wr pm pu30 pm30 alternate function output latch (p30) alternate function p-ch selector internal bus pu3 pm3 p3 v dd p3: ??? 3 pu3: ?? 3 pm3: ???? 3 rd: ?? wr : ? r01uh0312cj0110 rev.1.10 60 2013.11.29 pd79f7023, 79f7024 ?? ? 4-9. p31 ??? p31/txd0/cmpcom wr pu rd wr port wr pm pu31 output latch (p31) pm31 alternate function p-ch internal bus selector pu3 pm3 p3 v dd comparator common input p3: ??? 3 pu3: ?? 3 pm3: ???? 3 rd: ?? wr : ? r01uh0312cj0110 rev.1.10 61 2013.11.29 pd79f7023, 79f7024 ?? ? 4-10. p32 ??? p32/rxd0/cmpin wr pu rd wr port wr pm pu32 alternate function output latch (p32) pm32 p-ch selector internal bus pu3 pm3 p3 v dd comparator input p3: ??? 3 pu3: ?? 3 pm3: ???? 3 rd: ?? wr : ? r01uh0312cj0110 rev.1.10 62 2013.11.29 pd79f7023, 79f7024 ?? ? 4-11. p33 ??? p33/ti000/intp1 wr pu rd wr port wr pm pu33 alternate function output latch (p33) pm33 v dd p-ch selector internal bus pu3 pm3 p3 p3: ??? 3 pu3: ?? 3 pm3: ???? 3 rd: ?? wr : ? r01uh0312cj0110 rev.1.10 63 2013.11.29 pd79f7023, 79f7024 ?? ? 4-12. p34 ??? p34/ti010/to00/cmpout wr pu rd wr port wr pm pu34 alternate function output latch (p34) pm34 alternate function v dd p-ch selector internal bus pu3 pm3 p3 p3: ??? 3 pu3: ?? 3 pm3: ???? 3 rd: ?? wr : ? r01uh0312cj0110 rev.1.10 64 2013.11.29 pd79f7023, 79f7024 ?? 4.2.3 ? 12 p121 p122 ?? i/o ??????? 12(pm12) ? 125 ? 1 ? ?? p125 ??? p121-p122 ????? 12(pu12) ? ??????????????? / ??? i/o ? p125/reset ???????? (rsrmask) ? 5 (rstm) 1 ?? ?? rstm 0 ???? 12 ??? ? 12 ???? 4-13 4-14 ? 2013.11.29 ? 1. ? p121 p122 ??? (x1,x2) ?????? (exclk) ? ?????? (oscctl) x1 ?????? ( 5.3(1) ????? ? (oscctl)) oscctl ?? 00h ( p121 p122 ?? ) 2. reset/p125 ??? 3. ?? reset/p125 ??? ???????? ????? r01uh0312cj0110 rev.1.10 65 pd79f7023, 79f7024 ?? ? 4-13. p121 p122 ??? p122/x2/exclk/toold0 rd wr port wr pm pm122 pm12 p12 rd wr port wr pm pm121 pm12 p12 exclk, oscsel oscctl oscsel oscctl p121/x1/toolc0 oscsel oscctl oscsel oscctl internal bus selector output latch (p121) selector output latch (p122) p12: ??? 12 pu12: ?? 12 pm12: ???? 12 oscctl: ?????? rd: ?? wr : ? r01uh0312cj0110 rev.1.10 66 2013.11.29 pd79f7023, 79f7024 ?? ? 4-14. p125 ??? p125/reset wr pu rd wr pm pu125 rstm v dd p-ch pu12 rstmask internal bus internal reset pu12: ?? 12 rd: ?? wr : ? rstmask: ??? ? ?? reset/p125 ??? ????????? ???? ? ????? (rstm = 0, pu125 = 1) ??? rstm 1 r01uh0312cj0110 rev.1.10 67 2013.11.29 pd79f7023, 79f7024 ?? 4.3 ???? ??????? ? ????(pmxx) ? ???(pxx) ? ??(puxx) ? ???(rstmask) ? a/d ?? (adpc) (1) ???? (pmxx) ?? 1 ?????? 1 8 ??? ????? ffh ???? 4.5 ??????? ????? ? 4-15. ????? pmmn pmn i/o ??? (m = 2, 3, 12; n = 0 7) 0 ???? 1 ???? ? 1. ? adpc0 ???????? 2. ? cmppc ???????? ? ? pm3 ? 5 7 pm12 ? 0 ? 3 7 ? 1 r01uh0312cj0110 rev.1.10 68 2013.11.29 pd79f7023, 79f7024 ?? (2) ??? (pxx) ?????? ??????????????? 1 8 ??? ????? 00h ? 4-16. ???? m = 2, 3, 12; n = 0 7 pmn ???? ???? 0 0 ?? 1 1 ?? ? 1. ????? 2. x1 ?????????? 0 r01uh0312cj0110 rev.1.10 69 2013.11.29 pd79f7023, 79f7024 ?? (3) ?? (puxx) ???????????? ????????????? ?? 1 8 ??? ?????00h ( pu12 20h ) ? 4-17. ?? pumn pmn ? (m = 3, 12; n = 0 5) 0 ? 1 r01uh0312cj0110 rev.1.10 70 2013.11.29 pd79f7023, 79f7024 ?? (4) ??? (rstmask) ? reset/p125 ???/ ???? 1 8 ???? ????? 00h 2013.11.29 ? 4-18. ??? (rstmask) ? ? ff2dh 00h r/w 7 6 5 4 3 2 1 0 rstmask 0 0 rstm 0 0 0 0 0 rstm reset/p125 ?? 0 ? (reset) 1 ??? (p125) (5) a/d ?? (adpc) adpc p20/amp0-/ani0 p27/amp1+ i/o ??? i/o ??? 1 ?? adpc ? ??? 2 ?? 1 8 ???? ???adpc ? 00h ? 4-19. a/d ?? (adpc) ? ? ff97h 00h r/w 7 6 5 4 3 2 1 0 adpc adpc7 adpc6 adpc5 adpc4 adpc3 adpc2 adpc1 adpc0 adpcn i/o ? i/o ? (n = 0 7) 0 ? i/o 1 i/o ? 1. ????? 2(pm12) ????? 2. adpc ?????????? adpc ?? ? ?? r01uh0312cj0110 rev.1.10 71 pd79f7023, 79f7024 ?? 4.4 ??? ??????? 4.4.1 i/o ? (1) ?? ????? ???????? ???? (2) ?? ????????????? ?????? ???? 4.4.2 ? i/o ? (1) ?? ?????? (2) ?? ??????? 4.4.3 i/o ? (1) ?? ??? ??????? ???? (2) ?? ???????????? ???? r01uh0312cj0110 rev.1.10 72 2013.11.29 pd79f7023, 79f7024 ?? 4.5 ??????? ????? 4-9 ?????? 4-9. ??????? (1/2) i/o pm p ani0 ? 1 p20 p20 amp0- ? 1 ani1 ? 1 p21 p21 amp0out ? 1 ani2 ? 1 p22 p22 amp0+ ? 1 p23, p24 ani3, ani4 ? 1 p23, p24 p25 amp1- 1 p25 p26 amp1out 1 p26 p27 amp1+ 1 p27 intp0 1 p30 ti51 1 p30 toh1 0 txd0 0 p31 p31 cmpcom 1 rxd0 1 p32 p32 cmpin 1 intp1 1 p33 p33 ti000 1 to00 1 p34 ti010 0 p34 cmpout 1 ? ?? adpc ? pm2 ? ads ? amph ???? 4.2.1 ? 2 4- 4 4-8 ? pm : ???? p : ? r01uh0312cj0110 rev.1.10 73 2013.11.29 pd79f7023, 79f7024 ?? 4-9. ??????? (2/2) i/o pm p x1 ? 1 ? p121 toolc0 x2 ? 1 ? exclk ? 1 p122 toold0 i/o p125 reset ? 2 ? 1. ? p121 p122 ??? (x1,x2) ??????(exclk) ?? ?????(oscctl) x1 ??????( 5.3(1) ?????? (oscctl) ) oscctl ?? 00h (p121 p122 ???) 2. p125 ? (reset) ?rstm rstmask ? 5 ? ? pm : ???? p : ? r01uh0312cj0110 rev.1.10 74 2013.11.29 pd79f7023, 79f7024 ?? 4.6 ??? n(pn)1 ?? ????? 1 ??????????? ? ???????? < > p20 ???p21 p27 ????????? 1 ???? 00h ?? 1 ??? p20 ???????? 2 ?? ffh ? pmnm =1 ? pn ???????? pd79f7023 79f7024 ??? 1 ? <1> 8 ?? pn ? <2> ? 1 <3> 8 ? pn ? ? <1>?? p20 ??????? p21 p27 ?? ? p21 p27 ??????? feh ? <2>?? ffh ? <3> ?? ffh ? 4-20 1 ? (p20) low-level output 1-bit manipulation instruction (set1 p2.0) is executed for p20 bit. pin status: high level p20 p21 to p27 port 2 output latch 00000000 high-level output pin status: high level p20 p21 to p27 port 2 output latch 11111111 1-bit manipulation instruction for p20 bit <1> port register 2 (p2) is read in 8-bit units. ? in the case of p20, an output port, the value of the port output latch (0) is read. ? in the case of p21 to p27, input ports, the pin status (1) is read. <2> set the p20 bit to 1. <3> write the results of <2> to the output latch of port register 2 (p2) in 8-bit units. ? ?? 1 ? ? mov1, and1, or1, xor1, set1, clr1, not1 r01uh0312cj0110 rev.1.10 75 2013.11.29 pd79f7023, 79f7024 ?? ?? 5.1 ?? ????? cpu ? ???????? (1) ??? <1> x1 ?? ??? x1 x2 ?? f x = 1 10 mhz ?? ?? stop ?? osc ?? (moc) ???? <2> ??? ?? f ih = 4 mhz ( ?) ??cpu ???????? ? stop ??????(rcm) ???? ? exclk/x2/p122 ?????? (f exclk = 1 10 mhz) ?? stop ?? rcm ??????? ??????? (mcm) ????? x1 ????????? ? ? f x : x1 ?? f ih : ??? f exclk : ????? (2) ?? ( ??? ) ? ??? ?? f il = 240 khz( ?)???????? ??????????????(rcm)???? ??? cpu ??????? ? ?? ? 8 ? h1( ?f il , f il /2 7 f il /2 9 ?) ? f il : ??? r01uh0312cj0110 rev.1.10 76 2013.11.29 pd79f7023, 79f7024 ?? 5.2 ?? ??? 5-1. ?? ? ?? ?????? (oscctl) ???? (pcc) ???? (rcm) osc ?? (moc) ???? (mcm) ????? (ostc) ???? (osts) ?? x1 ? ? r01uh0312cj0110 rev.1.10 77 2013.11.29 pd79f7023, 79f7024 ?? ? 5-1. ????? lsrstop rsts rstop cpu pcc2 pcc1 pcc0 osts1 osts0 osts2 3 most 16 most 15 most 14 most 13 most 11 mcm0 xsel mcs mstop stop exclk oscsel 3 x1/p121 x2/exclk /p122 f il f xp f xp 2 f xp 2 2 f xp 2 3 f xp 2 4 f ih f xh f x f exclk f prs f cpu clock operation mode select register (oscctl) main osc control register (moc) internal bus internal bus main clock mode register (mcm) processor clock control register (pcc) oscillation stabilization time select register (osts) main clock mode register (mcm) high-speed system clock oscillator crystal/ceramic oscillation external input clock internal high- speed oscillator (4 mhz (typ.) x1 oscillation stabilization time counter oscillation stabilization time counter status register (ostc) system clock switch peripheral hardware clock switch controller prescaler selector internal low- speed oscillator (240 khz (typ.)) peripheral hardware watchdog timer, 8-bit timer h1 option byte 1: cannot be stopped 0: can be stopped internal oscillation mode register (rcm) r01uh0312cj0110 rev.1.10 78 2013.11.29 pd79f7023, 79f7024 ?? ? f x : x1 ?? f ih : ??? f exclk : ????? f xh : ???? f xp : ???? f prs : ??? f cpu : cpu ?? f il : ??? 5.3 ????? ? 7 ???? ? ?????? (oscctl) ? ????(pcc) ? ????(rcm) ? osc ?? (moc) ? ????(mcm) ? ?????(osts) ? ????(osts) r01uh0312cj0110 rev.1.10 79 2013.11.29 pd79f7023, 79f7024 ?? (1) ?????? (oscctl) ????????? ? 1 8 ?? oscctl ????? 00h ? 5-2. ?????? (oscctl) ?? ? ff9fh 00h r/w <7> <6> 5 4 3 2 1 0 oscctl exclk oscsel 0 0 0 0 0 0 exclk oscsel ????? ? p121/x1 p122/x2/exclk 0 0 ??? ? 0 1 x1 ?? ?/ ? 1 0 ??? ? 1 1 ???? ? ?? ? 1. ?? exclk oscsel ? osc ?? (moc) ? 7 (mstop) 1 (x1 ???? exclk ??? ) 2. ? 0 5 ? r01uh0312cj0110 rev.1.10 80 2013.11.29 pd79f7023, 79f7024 ?? (2) ???? (pcc) ?? cpu ????? ? 1 8 ?? pcc ???pcc ? 01h ? 5-3. ???? (pcc) ? ? fffbh 01h r/w 7 6 5 4 3 2 1 0 pcc 0 0 0 0 0 pcc2 pcc1 pcc0 pcc2 pcc1 pcc0 cpu ?(f cpu ) ? 0 0 0 f xp 0 0 1 f xp /2 ( ? ) 0 1 0 f xp /2 2 0 1 1 f xp /2 3 1 0 0 f xp /2 4 ? ? 1. ? 3 7 ? 2. pcc ??? , ?? (f prs )? ? f xp : ???? pd79f7023 79f7024 ????? 2 cpu ?? cpu ? f cpu ) ?????? 5-2 ? 5-2. cpu ??????? ???? 2/f cpu ??? ??? ? ?? ? cpu ?(f cpu ) ?? 10 mhz ?? 4 mhz ? f xp 0.2 s 0.5 s ( ? ) f xp /2 0.4 s 1.0 s ( ? ) f xp /2 2 0.8 s 2.0 s ( ? ) f xp /2 3 1.6 s 4.0 s ( ? ) f xp /2 4 3.2 s 8.0 s ( ? ) ? ???? (mcm)? cpu ????? (??? / ??)(? 5-3 ) r01uh0312cj0110 rev.1.10 81 2013.11.29 pd79f7023, 79f7024 ?? (3) ???? (rcm) ????? ? 1 8 ?? rcm ????? 80h ? 1 ? 5-4. ???? (rcm) ?? ? ffa0h 80h ? 1 r/w ? 2 <7> 6 5 4 3 2 <1> <0> rcm rsts 0 0 0 0 0 lsrstop rstop rsts ??? 0 ???? 1 ?? lsrstop ? /?? 0 ? 1 ??? rstop ? /?? 0 ? 1 ??? ? 1. ????? 00h ????? 80h 2. 7 ? ? rstop 1 ? , ? cpu ??????? ? mcs = 1 ? (cpu ????? ) ? rstop 1 ?????????? r01uh0312cj0110 rev.1.10 82 2013.11.29 pd79f7023, 79f7024 ?? (4) osc ?? (moc) ????????? cpu ??????????? x1 ? exclk ??? ? ? 1 8 ?? moc ????? 80h ? 5-5. osc ?? (moc) ?? ? ffa2h 80h r/w <7> 6 5 4 3 2 1 0 moc mstop 0 0 0 0 0 0 0 ???? mstop x1 ?? ???? 0 x1 exclk ??? 1 x1 ?? ? exclk ??? ? 1. ????? (rmc) ? 00h ? mstop ? 2. rstop 1 ? , ? cpu ?????? ? mcs = 0 ? (cpu ??? ) ? rstop 1 ???????????? 3. ?????? (oscctl) ? 6 (oscsel) ? 0 ????? mstop ? 4. ??????????????? ???? r01uh0312cj0110 rev.1.10 83 2013.11.29 pd79f7023, 79f7024 ?? (5) ???? (mcm) ??? cpu ??????????? ? 1 8 ?? mcm ????? 00h ? 5-6. ???? (mcm) ?? ? ffa1h 00h r/w ? 7 6 5 4 3 <2> <1> <0> mcm 0 0 0 0 0 xsel mcs mcm0 ???????? xsel mcm0 ??? (f xp ) ?? (f prs ) 0 0 0 1 ?? (f ih ) 1 0 ?? (f ih ) 1 1 ??? (f xh ) ??? (f xh ) mcs ????? 0 ??? 1 ????? ? 1 ? ? 1. xsel ??? 2. xsel mcm0 ?? f prs ??? ? ?????? ? ? ?f il ?, ?f il /2 7 ? ?f il /2 9 ? 8 ? h1 ??????? ? ?????? ( ? tm00 ??? ti000 ??? r01uh0312cj0110 rev.1.10 84 2013.11.29 pd79f7023, 79f7024 ?? (6) ????? (ostc) ?? x1 ??????cpu ?????? x1 ??? x1 ???? ? 1 8 ?? ostc (? reset ?poc lvi wdt ? )? stop ? mstop(moc ? 7 ) = 1 ostc ? 00h ? 5-7. ????? (osts) ?? ? ffa3h 00h r 7 6 5 4 3 2 1 0 ostc 0 0 0 most11 most 13 most14 most15 most16 most11 most13 mo st14 most15 most16 ???? f x = 10 mhz 1 0 0 0 0 2 11 /f x min. 204.8 s min. 1 1 0 0 0 2 13 /f x min. 819.2 s min. 1 1 1 0 0 2 14 /f x min. 1.64 ms min. 1 1 1 1 0 2 15 /f x min. 3.27 ms min. 1 1 1 1 1 2 16 /f x min. 6.55 ms min. ? 1. ??? most11 ?? 1 ??? 1 2. ???? osts ?????? cpu ?? stop ?????????? ? ? ostc ?? osts ??? ??? stop ?? osts ??? osts ????? 3 x1 ????????????? a ??? stop mode release x1 pin voltage waveform a ? f x :x1 ?? r01uh0312cj0110 rev.1.10 85 2013.11.29 pd79f7023, 79f7024 ?? (7) ???? (osts) stop ????? x1 ?????? cpu ?? x1 ?? stop ??? osts ??? cpu ????? stop ??? ostc ???????? ostc ?????? ? 1 8 ?? osts ???osts ? 05h ? 5-8. ???? (osts) ?? ? ffa4h 05h r/w 7 6 5 4 3 2 1 0 osts 0 0 0 0 0 osts2 osts1 osts0 osts2 osts1 osts0 ??? f x = 10 mhz 0 0 1 2 11 /f x 204.8 s 0 1 0 2 13 /f x 819.2 s 0 1 1 2 14 /f x 1.64 ms 1 0 0 2 15 /f x 3.27 ms 1 0 1 2 16 /f x 6.55 ms ? ? 1. cpu ? x1 ?? stop ??? stop ??? osts 2. x1 ?????? osts ? 3. ???? osts ?????? cpu ?? stop ?????????? ? ? ostc ?? osts ??? ??? stop ?? osts ??? osts ???? ? 4. 1 ????????????? a ??? stop mode release x1 pin voltage waveform a ? f x :x1 ?? r01uh0312cj0110 rev.1.10 86 2013.11.29 pd79f7023, 79f7024 ?? 5.4 ????? 5.4.1 x1 ?? x1 ???? x1 x2 ??? (1 10 mhz) ?? ????? exclk ??? x1 ????? 5-9 ? ? 5-9.x1 ?? (a) ? (b) ?? x1 x2 v ss exclk external clock ? ? x1 ?? 5-10 ????????? ? ?? ? ??????? ? ?????? vss ???????????? ? ???? ?? 5-10 ? r01uh0312cj0110 rev.1.10 87 2013.11.29 pd79f7023, 79f7024 ?? ? 5-10. ? (1/2) (a) ? (b) ?? x2 v ss x1 x1 v ss x2 port (c) ? (d) ? (a b c ? ) v ss x1 x2 v ss x1 x2 ab c pmn v dd high current high current r01uh0312cj0110 rev.1.10 88 2013.11.29 pd79f7023, 79f7024 ?? ? 5-10. ? (2/2) (e) ?? v ss x1 x2 5.4.2 ??? pd79f7023 79f7024 ??????? (rcm) ?? ??????? 5.4.3 ??? pd79f7023 79f7024 ??? ????? 8 ? h1 ????? cpu ?? ????? ? ?? ? ? ??? ?? ?? ? ????? (rcm) , ???????? ? ???? ?? (240 khz (?)) 5.4.4 ?? cpu ??????????????? r01uh0312cj0110 rev.1.10 89 2013.11.29 pd79f7023, 79f7024 ?? 5.5 ?? ???, cpu ????? ? 5-1 ? ??? f xp ? ??? f xh x1 ? f x ???? f exclk ? ?? f ih ? ?? f il ? cpu ? f cpu ? ?? f prs pd79f7023 79f7024 ?? cpu ????? ?? (1) ?? x1 ??? cpu ??????2? x1 ??? cpu ???????????? ??????????? (2) ? cpu ? x1 ??????? ?????? 5-11 5-12 ? r01uh0312cj0110 rev.1.10 90 2013.11.29 pd79f7023, 79f7024 ?? ? 5-11. ???? (lvi ?????? ( ?? :lvistart = 0)) 0 v 1.59 v (typ.) 1.8 v 0.5 v/ms (min.) internal high-speed oscillation clock (f ih ) cpu clock high-speed system clock (f xh ) (when x1 oscillation selected) subsystem clock (f sub ) (when xt1 oscillation selected) note 3 internal reset signal power supply voltage (v dd ) reset processing (12 to 51 s) <3> waiting for voltage stabilization (0.93 to 3.7 ms) <1> <2> <4> <4> internal high-speed oscillation clock high-speed system clock switched by software subsystem clock note 3 <5> <5> x1 clock oscillation stabilization time: 2 8 /f x to 2 18 /f x note 2 starting x1 oscillation is set by software. starting xt1 oscillation is set by software. waiting for oscillation accuracy stabilization (102 to 407 s) note 1 <1> ???? (poc) ??? <2> ? 1.59 v( ? ) ?????? <3> ?? 0.5v/ms( ? ) ????????? cpu ? ??????? <4> ? x1 ????? ( 5.6.1 ????? ?(1)) <5> cpu ? x1 ?????? ( 5.6.1 ????? ?(3) ) ? 1. ????????????? 2. ?? cpu ???? stop ?????? ???(ostc) ? x1 ????? cpu ????(x1 ??? ????(osts) y stop ????? r01uh0312cj0110 rev.1.10 91 2013.11.29 pd79f7023, 79f7024 ?? ? 1. ?? 2.7v ???? 0.5v/ms( ? )? ?? reset ? ?? 2.7v ?? , ??? (lvistart = 1) lvi ? ( ? 5-12) ?? reset ??? 2.7v ?? reset ? cpu ?? 5-11 <2> ? ? 2 ? exclk ??????? ? ????????? cpu ????? stop ????? ??????? 5.6.1 ????? ? (4) 5.6.2 ??? (3)) ? 5-12. ???? (lvi ???? ( ?? :lvistart = 1)) 0 v 2.7 v (typ.) internal high-speed oscillation clock (f ih ) cpu clock high-speed system clock (f xh ) (when x1 oscillation selected) internal reset signal power supply voltage (v dd ) internal high-speed oscillation clock high-speed system clock switched by software <5> <1> <3> <2> <4> <4> x1 clock oscillation stabilization time: 2 8 /f x to 2 18 /f x note starting x1 oscillation is set by software. reset processing (12 to 51 s) waiting for oscillation accuracy stabilization (102 to 407 s) <1> ???? (poc) ??? <2> ? 2.7 v( ? ) ? ????? <3> ?? cpu ????? <4> ? x1 ????? ( 5.6.1 ????? ?(1)) <5> cpu ? x1 ?????? ( 5.6.1 ????? ?(3)) r01uh0312cj0110 rev.1.10 92 2013.11.29 pd79f7023, 79f7024 ?? ? ?? cpu ???? stop ?????? ???(ostc) ? x1 ????? cpu ????(x1 ????? ??(osts) y stop ????? ? 1. ??? 1.59v( ????? 0.93 3.7ms ?????? ?? 1.59v( ? 2.7v( ??????????? 2 ? exclk ??????? ? ????????? cpu ????? stop ????? ??????? 5.6.1 ????? ?(4) 5.6.2 ??? ? (3)) 5.6 ? 5.6.1 ????? ?????? ? x1 ?? / ?? x1 x2 ? ? ????? ??? exclk ? ??????x1/p121 x2/exclk/p122 ??? ? x1/p121 x2/exclk/p122 ???? ?? (1) x1 ? (2) ????? (3) ??? cpu ??? (4) ????? r01uh0312cj0110 rev.1.10 93 2013.11.29 pd79f7023, 79f7024 ?? (1) x1 ??? <1> p121/x1 p122/x2/exclk ?? x1 ???? (oscctl ?) exclk oscsel ?1? ????? x1 ?? exclk oscsel ??????? p121/x1 p122/x2/exclk 0 1 x1 ?? ?/ ? <2> x1 ? (moc ?) mstop ? x1 ??? <3> ? x1 ?? ostc ???? ????????? ? 1. x1 ???? exclk oscsel ? 2. ?????? x1 ? ( ??? ) (2) ??????? <1> p121/x1 p122/x2/exclk ???? (oscctl ?) exclk oscsel ?1? ????????? exclk oscsel ??????? p121/x1 p122/x2/exclk 1 1 ???? ? ?? <2> ????(moc ?) mstop ??????? ? 1. ??????? exclk oscsel ? 2. ?????????? ( ??? ) (3) ??? cpu ????? <1> ???? ? ( 5.6.1 (1) x1 ??? (2) ??????? ) ? ????, ?1? r01uh0312cj0110 rev.1.10 94 2013.11.29 pd79f7023, 79f7024 ?? <2> ????????(mcm ?) xsel mcm0 ?1? ??????????? ??????? xsel mcm0 ??? (f xp ) ?? (f prs ) 1 1 ??? (f xh ) ??? (f xh ) ? ?????????????????? <3> ???? cpu ???? (pcc ?) ???? cpu ? pcc0 pcc1 pcc2 ? cpu ???? pcc2 pcc1 pcc0 cpu ?(f cpu ) ? 0 0 0 f xp 0 0 1 f xp /2 ( ? ) 0 1 0 f xp /2 2 0 1 1 f xp /2 3 1 0 0 f xp /2 4 ? (4) ??????? ???????? ? ? stop ???? x1 ????????? ? mstop ?1? ?? x1 ????????? (a) ? stop ? <1> ??? ?? stop ??????? stio ????? ? <2> x1 ???? cpu ? x1 ??? stop ??? osts ?? <3> ? stop ? ? stop ?? stop ???? x1 ?????? r01uh0312cj0110 rev.1.10 95 2013.11.29 pd79f7023, 79f7024 ?? (b) ? mstop 1 ?? x1 ( ??? ) <1> ? cpu ??? (pcc mcm ?) ? cls mcs ? cpu ???????? cls = 0 mcs = 1 ????? cpu ? cpu ?????????? mcs cpu ??? 0 ?? 1 ??? <2> ?????(moc ?) mstop ?1? ??? x1 (???) ? mstop "1" ?? mcs = 0 cls = 1 ??????????? 5.6.2 ??? ??? (1) ???? (2) ?? cpu ??????????? (3) ?????? (1) ???? ? 1 (1) ????(rcm ?) rstop ????? <2> ?????????(rcm ? ) ?rsts ?1? ? 2 ? 1. ???????? cpu ?? 2. cpu ?????????????? r01uh0312cj0110 rev.1.10 96 2013.11.29 pd79f7023, 79f7024 ?? (2) ?? cpu ???????????? <1> ? ??? ? ( 5.6.2 (1) ???? ) ? ??? ? ????????( 5.6.1 (1) x1 ??? (2) ??????? ) ? ????????, ??1? <2> ??????????(mcm ?) xsel mcm0 ??????? ??????? xsel mcm0 ??? (f xp ) ?? (f prs ) 0 0 0 1 ?? (f ih ) 1 0 ?? (f ih ) ??? (f xh ) <3> ? cpu ??? (pcc ? ) ???? cpu ? pcc0 pcc1 pcc2 ? cpu ???? pcc2 pcc1 pcc0 cpu ?(f cpu ) ? 0 0 0 f xp 0 0 1 f xp /2 ( ? ) 0 1 0 f xp /2 2 0 1 1 f xp /2 3 1 0 0 f xp /2 4 ? r01uh0312cj0110 rev.1.10 97 2013.11.29 pd79f7023, 79f7024 ?? (3) ?????? ??????? ? ? stop ?? stop ?? ? rstop ?1? ????? (a) ? stop ? <1> ? ?? stop ??????? stio ????? ? <2> x1 ???? cpu ? x1 ??? stop ??? osts ??stop ?? cpu ?mcm0 ? cpu ????? rsts ?1? <3> ? stop ? ? stop ?? stop ??????? (b) ? rstop 1 ???? <1> ? cpu ??? (pcc mcm ?) ? cls mcs ? cpu ???????? cls = 0 mcs = 0 ???? cpu ?cpu ?????? ?? mcs cpu ??? 0 ?? 1 ??? <2> ????(rcm ?) rstop ?1? ????? ? rstop 1 ?? mcs = 1 cls = 1 ???????? r01uh0312cj0110 rev.1.10 98 2013.11.29 pd79f7023, 79f7024 ?? 5.6.3 ??? ??? cpu ?? ???? ? ?? ? 8 ? h1 f il ??? ?????2?? ? ???? ? ????? , ???????? ? ???? ?? (240 khz (?)) (1) ?????? <1> lsrstop ?1?(rcm ? ) lsrstop ?1? ????? (2) ???? <1> lsrstop (rcm ? ) lsrstop ????? ? ???? ? ???? ? ?????? r01uh0312cj0110 rev.1.10 99 2013.11.29 pd79f7023, 79f7024 ?? 5.6.4 cpu ?? ? cpu ??????? 5-3. ? cpu ????? ?? ? cpu ? ??? xsel mcm0 exclk ?? 0 x1 ? 1 0 0 ?? ???? 1 0 1 x1 ? 1 1 0 ???? 1 1 1 ? xsel: ????(mcm) 2 mcm0: mcm 0 exclk: ??????(oscctl) 7 : r01uh0312cj0110 rev.1.10 100 2013.11.29 pd79f7023, 79f7024 ?? 5.6.5 cpu ????? ? cpu ?????? 5-13 ? ? 5-13. cpu ????? ( ?? lvi ??? ( ?? :lvistart = 0)) power on reset release cpu: operating with x1 oscillation or exclk input cpu: x1 oscillation/exclk input stop cpu: x1 oscillation/exclk input halt (b) (a) (c) (f) (e) (h) (i) internal low-speed oscillation: woken up internal high-speed oscillation: woken up x1 oscillation/exclk input: stops (input port mode) internal low-speed oscillation: operating internal high-speed oscillation: operating x1 oscillation/exclk input: stops (input port mode) cpu: operating with internal high- speed oscillation internal low-speed oscillation: operable internal high-speed oscillation: operating x1 oscillation/exclk input: selectable by cpu internal low-speed oscillation: operable internal high-speed oscillation: selectable by cpu x1 oscillation/exclk input: operating internal low-speed oscillation: operable internal high-speed oscillation: stops x1 oscillation/exclk input: stops internal low-speed oscillation: operable internal high-speed oscillation: operating x1 oscillation/exclk input: operable internal low-speed oscillation: operable internal high-speed oscillation: stops x1 oscillation/exclk input: stops internal low-speed oscillation: operable internal high-speed oscillation: operable x1 oscillation/exclk input: operating cpu: internal high- speed oscillation stop cpu: internal high- speed oscillation halt v dd 1.8 v (min.) v dd < 1.59 v (typ.) v dd 1.59 v (typ.) ? lvi ?(??:lvistart = 1) ???? 2.7v( ?) cpu ? ?????(a)??(b) (12 51 s) r01uh0312cj0110 rev.1.10 101 2013.11.29 pd79f7023, 79f7024 ?? cpu ?? sfr ?? 5-4 ? 5-4. cpu ? sfr ?? 1/2 (1) (a) ,cpu ??? (b) ??? sfr ? (a) (b) sfr ???? (2) (a) ,cpu ????? (c) (cpu ??? (b)) sfr ? ) sfr ??? ) ??? exclk oscsel mstop ostc ? xsel mcm0 (a) (b) (c) (x1 ?) 0 1 0 1 1 (a) (b) (c) ( ???? ) 1 1 0 ? 1 1 ? ???????( ?? ) (3) cpu ???? (b) ??? (c) sfr ? ) sfr ??? ) ??? exclk oscsel mstop ostc xsel ? mcm0 (b) (c) (x1 ? ) 0 1 0 1 1 (b) (c) ( ???? ) 1 1 0 ? 1 1 ? , ? cpu ?? ???? ? ?????????? ? ??????? ( ?? ( ? )) ? 1. 5-4 (a) (i) ?? 5-13 (a)(i) 2. exclk, oscsel ??????(oscctl) 7 ? 6 mstop osc ??(moc) 7 xsel, mcm0 ????(mcm) 2 ? 0 r01uh0312cj0110 rev.1.10 102 2013.11.29 pd79f7023, 79f7024 ?? 5-4. cpu ? sfr ?? 2/2 (4) cpu ?????? (c) ?? (b) sfr ? ) sfr ??? ) ??? rstop rsts mcm0 (c) (b) 0 ????? ?1? 0 cpu ??? , ? (5) ? cpu ??? (b) ?? halt ?? (e) ? cpu ?????? halt ?? (f) ??? (b) (e) (c) (f) ? halt ? (6) ? cpu ??? (b) ?? stop ?? (h) ? cpu ???? (c) ?? stop ?? (i) ( ??? (b) (h) (c) (i) ? stop ???? ? stop ? ? 1. 5-4 (a) (i) ?? 5-13 (a)(i) 2. mcm0 ???? (mcm) 0 rsts, rstop ????(rcm) 7 ? 0 r01uh0312cj0110 rev.1.10 103 2013.11.29 pd79f7023, 79f7024 ?? 5.6.6 cpu ??? cpu ???? 5-5.cpu ? cpu ? ? ? x1 ? x1 ? ? mstop = 0, oscsel = 1, exclk = 0 ? ? ??? (rstop = 1) ? ? ???? exclk ??? ? mstop = 0, oscsel = 1, exclk = 1 ??? (rstop = 1) x1 ? ?? x1 (mstop = 1) ???? ?? ? ? rstop = 0 ????? (mstop = 1) r01uh0312cj0110 rev.1.10 104 2013.11.29 pd79f7023, 79f7024 ?? 5.6.7 ???? ??????(pcc) ? 0 2 (pcc0 pcc2) ??????? pcc ????????? ( ? 5-6 ) 5-6. ?????? ?? ? pcc2 pcc1 pcc0 pcc2 p cc1 pcc0 pcc2 pcc1 pcc0 pcc2 p cc1 pcc0 pcc2 pcc1 pcc0 pcc2 pcc1 pcc0 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 0 0 0 16 ? 16 ? 16 ? 16 ? 0 0 1 8 ? 8 ? 8 ? 8 ? 0 1 0 4 ? 4 ? 4 ? 4 ? 0 1 1 2 ? 2 ? 2 ? 2 ? 1 0 0 1 ? 1 ? 1 ? 1 ? ? 5-6 ??? cpu ? ????? (mcm) ? 0 (mcm0) ???????????? ? mcm0 ????????? ( ? 5-7 ) ? mcm ? 1 ? cpu ????????? 5-7. ????? ?? ? mcm0 mcm0 0 1 0 1 + 2f ih /f xh ? 1 1 + 2f xh /f ih ? ? ?????? mcm ? 2 ? ?1? ?? xsel ?? ? ? 1. 5-7 ?????? 2. ?? 5-7 ? ? ?????????(@ ? f ih = 8 mhz, f xh = 10 mhz) 1 + 2f ih /f xh = 1 + 2 8/10 = 1 + 2 0.8 = 1 + 1.6 = 2.6 2 ? r01uh0312cj0110 rev.1.10 105 2013.11.29 pd79f7023, 79f7024 ?? 5.6.8 ???? ????????????????? 5-8. ?????? ? ???? ???? sfr ??? ?? mcs = 1 (cpu ???? ) rstop = 1 x1 ? ???? mcs = 0 (cpu ??? ) mstop = 1 5.6.9 ??? pd79f7023 79f7024 ?????? 5-9. ??? s ?? ? ?? (f prs ) ?? (f il ) ???? 16 ?/ ? 00 y n y (ti000 pin) ? 8 ?/ ? 00 51 y n y (ti51 pin) ? 8 ? h1 y y n ?? n y n a/d ? y n n ? uart0 y n n ? stop ????????? ? y: ?n: ? r01uh0312cj0110 rev.1.10 106 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 16 ? / ? 00 6.1 16 ? / ? 00 16 ?/ ? 00 1? (1) ? ???? (2) ??? (3) ?? ???? (4) ??^ (5) ppg ???? (6) ? ????? r01uh0312cj0110 rev.1.10 107 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 6.2 16 ? / ? 00 16 ?/ ? 00 ? 6-1. 16 ? / ? 00 ? ?/ 16 ?/ ? 00 (tm00) ? 16 ?? / ??? 000, 010 (cr000, cr010) ? ti000, ti010 ? to00, ?? 16 ???? 00 (tmc00) 16 ?? / ???? 00 (crc00) 16 ??? 00 (toc00) ????? 00 (prm00) ???? 3 (pm3) ??? 3 (p3) ? 6-1. 16 ? / ? 00 ?? internal bus capture/compare control register 00 (crc00) ti010/to00/p34/ cmpout ti000/p33/intp1 prescaler mode register 00 (prm00) 2 prm001 prm000 crc002 16-bit timer capture/compare register 010 (cr010) match match 16-bit timer counter 00 (tm00) clear noise elimi- nator crc002 crc001 crc000 inttm000 inttm010 16-bit timer output control register 00 (toc00) 16-bit timer mode control register 00 (tmc00) internal bus tmc003 tmc002 tmc001 ovf00 toc004 lvs00 lvr00 toc001 toe00 selector 16-bit timer capture/compare register 000 (cr000) selector selector selector noise elimi- nator noise elimi- nator output controller ospe00 ospt00 to cr010 to00/ti010/ p34/cmpout to00 output output latch (p34) pm34 f prs f prs /2 2 f prs /2 8 f prs r01uh0312cj0110 rev.1.10 108 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 1. p34 ???? ti010 ??? (to00) ????? 2. 16 ????? 00(tmc00) ? 3 ? 2 (tmc003 tmc002) ? 00 ? ????? 3. ???????? tmc003 tmc002 ? 00 ?? ??? cr000 ????????? (1) 16 ? / 00 (tm00) tm00 16 ?? ??? ? 6-2. 16 ? / 00 (tm00) ? 16 ????? 00(tmc00) ? 3 ? 2 ?? 00 ??? tm00 ? tm00 ? ? tmc003 tmc002 = 00 tm00 ???? 0000h ?? 0000h ? ??? ? tmc003 tmc002 ?00 ? ti000 ????? ti000 ? tm00 cr00 ????? tm00 cr00 ? ??ospt00 ?1? ti000 ? ? tm00 ???? cr010 ?? r01uh0312cj0110 rev.1.10 109 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 (2) 16 ?? / ??? 000(cr000), 16 ?? / ??? 010(cr010) cr000 cr010 16 ?? crc00 ?????? ???(tmc003 tmc002 = 00) ?? cr000 ? ????? cr010 ? 6.5.1 tm00 ? cr010 ?? 16 ??? ???? 00h ? 6-3. 16 ?? / ??? 000(cr000) ? (i) cr000 ??? cr000 ?? tm00 ??????(inttm000) ??? cr000 ? cr000 ??????????? (i) cr000 ?? ???tm00 ?? cr000 ??? crc00 prm00 ? ti000 ??? ti010 ?? r01uh0312cj0110 rev.1.10 110 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-4. 16 ?? / ??? 010(cr010) ? (i) cr010 ??? cr010 ?? tm00 ?????? (inttm010) ? cr010 ??????????? (ii) cr010 ?? ???tm00 ?? cr010 ?? ti000 ??? prm00 ti000 ? (iii) cr000 cr010 ????| cr000 cr010 ????? cr000 ?| cr010 ?| ? ?? 0000h < n ffffh 0000h ? m ffffh ?????? (inttm010) ? ti000 ???? ? 0000h ? n ffffh 0000h ? m ffffh ppg m < n ffffh 0000h ? m < n 0000h ? n ffffh (n m) 0000h ? m ffffh (m n) ? ? 0000h ????????????? ?(tm00) 0000h 0001h ??? ? ??? ? ti000 ????? ti000 ???? ? ????(? tm00 cr000 ? (cr000 = 0000h ? , cr010 = 0000h) ???) operation enabled (other than 00) tm00 register timer counter clear interrupt signal is not generated interrupt signal is generated timer operation enable bit (tmc003, tmc002) interrupt request signal compare register set value (0000h) operation disabled (00) r01uh0312cj0110 rev.1.10 111 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 1. n:cr000 ??? m:c0brp ??? 2. ??(tmc00 ? 3 ? 2 (tmc003 tmc002) 6.3 (1) 16 ??? ? 00(tmc00) r01uh0312cj0110 rev.1.10 112 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 6-2. cr000 cr010 ?? ? ? ti000 ti010 2013.11.29 es010 es000 ? es110 es100 ? 01: 01: crc001 = 0 ti010 cr000 ? crc001 = 1 ti000 ( ) 00:? 00:? 11:? ?? 11:? ? ? ???? inttm000 ?? ????? inttm000 ?? es010 es000 ? ti000 ? cr010 ? 01: 00:? 11:? ? ????? inttm010 ?? ? crc001 ?? cr010 ?? ? ?? ti000 ??? tm00 ? cr000 ????? ? (inttm000) ? ti010 ???? inttm000 ?????? inttm000 ?? ? crc001: 6.3 (2) ? / ???? 00(crc00) es110, es100, es010, es000: 6.3 (4) ????? 00(prm00) r01uh0312cj0110 rev.1.10 113 pd79f7023, 79f7024 16 ? / ? 00 6.3 16 ? / ? 00 ??? 16 ?/ ? 00 ???? ? 16 ????? 00 (tmc00) ? ?/ ???? 00 (crc00) ? 16 ??? 00 (cr010) ? ????? 00 (prm00) ? ???? 3(pm3) ? ??? 3 (p3) (1) 16 ????? 00 (tmc00) tmc00 8 ? 16 ? / ? 00 ?? tm00 ???? ?? tmc tmc003 tmc002 = 00 ? ) tmc003 tmc002 ? 00 ??? ovf00 ? ? 1 8 ?? tmc00 ???tmc00 ? 00h ? tmc003 tmc00216 ? 00( ???? ) ??? , 16 ? / ??? tmc003 tmc002 ? 00 ?? r01uh0312cj0110 rev.1.10 114 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-5. 16 ????? 00(tmc00) ? ? ff86h 00h r/w 7 6 5 4 3 2 1 <0> tmc00 0 0 0 0 tmc003 tmc002 tmc001 ovf00 16 ? / ? 00 tmc003 tmc002 2013.11.29 0 0 ?16 ? / ? 00 ????16 ?/ ? 00(tm00) 0 1 ??? ? 1 0 ? ti000 ??? 1 1 tm00 cr000 ????? ? (to00) tmc001 ? tm00 cr000 ? tm00 cr010 ? 0 ? tm00 cr000 ? tm00 cr010 ? ? ti000 ?? 1 tm00 ? ovf00 0 ovf00 tmc003 tmc002 = 00 ?1 ?????? ti000 ???? tm00 cr000 ? ??? tm00 ffffh ? 0000h ? ovf00 1 ?? 1 ovf00 1 ? ?????? 00(prm00) ? 5 4 (es001 es000) ti000 ?? (2) ? / ???? 00 (crc00) crc00 cr000 cr010 ? ??? crc00 tmc003 tmc002 = 00 ?) 1 8 ?? crc00 ??? crc00 ? 00h r01uh0312cj0110 rev.1.10 115 pd79f7023, 79f7024 16 ? / ? 00 ? 6-6. ? / ???? 00(crc00) ? ? ff88h 00h r/w 7 6 5 4 3 2 1 0 crc00 0 0 0 0 0 crc002 crc001 crc000 cr010 ??? crc002 ??? 0 ?? 1 cr000 ?? crc001 ti010 ?? 0 ti000 ??? ? 1 ? prm00 ti010 ti000 ?? crc001 1 ? es010 ex000 11 ? ti000 ? cr000 ??? crc000 ??? 0 ?? 1 tmc003 tmc002 11 tm00 cr000 ?????? crc000 ? ? ti010 ???? inttm000 ???? ? ???? , ????????? 00(prm00) ??? ?? ? 6-7. cr010 ???? count clock tm00 ti000 rising edge detection cr010 inttm010 n ? 3n ? 2n ? 1 n n + 1 n valid edge r01uh0312cj0110 rev.1.10 116 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 (3) 16 ??? 00 (toc00) tab1ioc4 8 ?? to00 ? ospt00 ?? toc00(tmc003 tmc002= 00 ????? ???? cr010 ? toc004( 6.5.1 tm00 ? cr010 ) ? 1 8 ?? toc00 ???toc00 ? 00h ? ?2 toc00 <1> toc004 toc001 ?1? <2> toe00 ?1? <3> lvs00 lvr00 ?1? r01uh0312cj0110 rev.1.10 117 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-8. 16 ??? 00(toc00) ? ? ff89h 00h r/w 7 <6> <5> 4 <3> <2> 1 <0> toc00 0 ospt00 ospe00 toc004 lvs00 lvr00 toc001 toe00 ? ospt00 ? 0 1 ???? 1 ?????1 ? 1 tm00 ? ospe00 0 1 ???? ti000 ?????^ tm00 cr000 ?????^ cr010 tm00 ?? to00 toc004 ?? 0 ?? 1 ? toc004 = 0 ?? (inttm010) to00 ?? lvs00 lvr00 2013.11.29 0 0 ? 0 1 to00 ????? (to00 ) 1 0 to00 ????? (to00 1 ) 1 1 ? ? lvs00 lvr00 to00 ?????? lvs00 lvr00 ? 00 ? toe00 = 1 ? lvs00 lvr00 ??? lvs00 lvr00 toe00 1 ? lvs00 lvr00 ??? 1 to00 ????? ??? to00 ? lvs00 lvr00 ????? 0 ? lvs00 lvr00 ? 6.5.2 lvs00 lvr00 ? to00 ???? to00/ti010/p01 ? pm01 p01 cr000 tm00 ?? to00 toc001 ?? 0 ?? 1 ? toc001 = 0 ?? (inttm000) to00 toe00 ? to00 ??? 0 1 r01uh0312cj0110 rev.1.10 118 pd79f7023, 79f7024 16 ? / ? 00 (4) ????? 00(prm00) prm00 ? tm00 ?? ti000 ti010 ? ?? prm00 tmc003 tmc002 = 00 ? ) ? 1 8 ?? prm00 ??prm00 ? 00h ? 1. prm001 prm000 ?11? ( ? ti000 ?? ) ?? ? ? ti000 ???? ? ti000 ?? 2. ti000 ti010 ???? , ???? ti000 ti010 ?? 16 ? / ? 00 ? ti000 ti010 ????? ti000 ti010 ??????????? 3. p34 ???? ti010 ??? (to00) ????? r01uh0312cj0110 rev.1.10 119 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-9. ????? 00(prm00)? ? ff87h 00h r/w 7 6 5 4 3 2 1 0 prm00 es110 es100 es010 es000 0 0 prm001 prm000 ti010 ? es110 es100 2013.11.29 0 0 ? 0 1 1 0 ? 1 1 ?? ti000 ? es010 es000 0 0 ? 0 1 1 0 ? 1 1 ?? ?? prm001 prm000 f prs = 2 mhz f prs = 5 mhz 0 0 f prs 2 mhz 5 mhz 0 1 f prs /2 2 500 khz 1.25 mhz 1 0 f prs /2 8 7.81 khz 19.53 khz 1 1 ti000 ? 1,2 ? 1. ti000 ??????? (f prs ) ? 2. stop ???? ti000 ???? ? f prs : ???? r01uh0312cj0110 rev.1.10 120 pd79f7023, 79f7024 16 ? / ? 00 (5) ???? 3(pm3) ? 1 ?? 3 p34/to00/ti010/cmpout ??pm34 p34 ? p33/ti000/intp1 p34/ti010/to00/cmpout ??pm33 pm34 ?1? ?p33 p34 r?1 1 8 ?? pm3 ???pm3 ? ffh ? 6-10. ???? 3(pm3)? ? ff23h ffh r/w 7 6 5 4 3 2 1 0 2013.11.29 pm0 1 1 1 pm34 pm33 pm32 pm31 pm30 p3n i/o ??? (n = 0 4) pm3n ???? 0 ???? 1 r01uh0312cj0110 rev.1.10 121 pd79f7023, 79f7024 16 ? / ? 00 6.4 16 ? / ? 00 6.4.1 ? 16 ????? (tmc00) ? 3 ? 2 (tmc003 tmc002) 1 (tm00 cr000 ? ???)?? tm00 ? cr00 ??? tm00 ? 0000h ?? inttm000) inttm000 ? tm00 ? ? 1. i/o ?? 6.3 (5) ???? 3(pm3) 2. inttm000 ? ? ? ? 6-11. ???? 16-bit counter (tm00) cr000 register operable bits tmc003, tmc002 count clock clear match signal inttm000 signal ? 6-12. ???? tm00 register 0000h operable bits (tmc003, tmc002) compare register (cr000) compare match interrupt (inttm000) n 11 00 n n n n interval (n + 1) interval (n + 1) interval (n + 1) interval (n + 1) r01uh0312cj0110 rev.1.10 122 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-13. ???? (a) 16 ????? 00(tmc00) 00001100 tmc003 tmc002 tmc001 ovf00 clears and starts on match between tm00 and cr000. (b) ? / ???? 00(crc00) 00000000 crc002 crc001 crc000 cr000 used as compare register (c) 16 ??? 00(toc00) 00000 lvr00 lvs00 toc004 ospe00 ospt00 toc001 toe00 000 (d) ????? 00(prm00) 00000 3 2 prm001 prm000 es110 es100 es010 es000 selects count clock 0 0/1 0/1 (e) 16 ? / 00(tm00) ?? tm00 ?? (f) 16 ?? / ??? 000(cr000) m ? cr000 ? ? ? = (m + 1) ? ? cr000 ? 0000h (g) 16 ? / ??? 010(cr010) cr010 ??? cr010 ?? tm00 ?????(inttm010) ??????(tmmk010) r01uh0312cj0110 rev.1.10 123 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-14. ??? tm00 register 0000h operable bits (tmc003, tmc002) cr000 register inttm000 signal n 11 00 n n n <1> <2> tmc003, tmc002 bits = 11 tmc003, tmc002 bits = 00 register initial setting prm00 register, crc00 register, cr000 register, port setting initial setting of these registers is performed before setting the tmc003 and tmc002 bits to 11. starts count operation the counter is initialized and counting is stopped by clearing the tmc003 and tmc002 bits to 00. start stop <1> count operation start flow <2> count operation stop flow r01uh0312cj0110 rev.1.10 124 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 6.4.2 16 ?/ ? 00 ? 6.4.1 ?? 16 ??? 00(toc00) ? 03h ? to00 tmc003 tmc002 11 (tm00 cr000 ???? )?? tm00 ? cr00 ??? tm00 ? 0000h ?? inttm000) ? to00 ? to0n ? 1. i/o ?? 6.3 (5) ???? 3(pm3) 2. inttm000 ?? ? ? ? 6-15. ??? 16-bit counter (tm00) cr000 register operable bits tmc003, tmc002 count clock clear match signal inttm000 signal output controller to00 output to00 pin ? 6-16. ??? tm00 register 0000h operable bits (tmc003, tmc002) compare register (cr000) to00 output compare match interrupt (inttm000) n 11 00 n n n n interval (n + 1) interval (n + 1) interval (n + 1) interval (n + 1) r01uh0312cj0110 rev.1.10 125 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-17. ??? (a) 16 ????? 00(tmc00) 00001100 tmc003 tmc002 tmc001 ovf00 clears and starts on match between tm00 and cr000. (b) ? / ???? 00(crc00) 00000000 crc002 crc001 crc000 cr000 used as compare register (c) 16 ??? 00(toc00) 0 0 0 0 0/1 lvr00 lvs00 toc004 ospe00 ospt00 toc001 toe00 enables to00 output. inverts to00 output on match between tm00 and cr000. 0/1 1 1 specifies initial value of to00 output f/f (d) ????? 00(prm00) 00000 3 2 prm001 prm000 es110 es100 es010 es000 selects count clock 0 0/1 0/1 (e) 16 ? / 00(tm00) ?? tm00 ?? (f) 16 ?? / ??? 000(cr000) m ? cr000 ? ? ? = 1 / [2 (m + 1) ?] ? cr000 ? 0000h (g) 16 ? / ??? 010(cr010) cr010 ??? cr010 ?? tm00 ?????(inttm010) ??????(tmmk010) r01uh0312cj0110 rev.1.10 126 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-18. ?? tm00 register 0000h operable bits (tmc003, tmc002) cr000 register to00 output inttm000 signal to0n output control bit (toc001, toe00) tmc003, tmc002 bits = 11 tmc003, tmc002 bits = 00 register initial setting prm00 register, crc00 register, toc00 register note , cr000 register, port setting initial setting of these registers is performed before setting the tmc003 and tmc002 bits to 11. starts count operation the counter is initialized and counting is stopped by clearing the tmc003 and tmc002 bits to 00. start stop <1> count operation start flow <2> count operation stop flow n 11 00 n n n <1> <2> 00 ? toc00 ????? 6.3 (3) 16 ??? 00(toc00) r01uh0312cj0110 rev.1.10 127 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 6.4.3 ?? ?? 00(prm00) ? 1 ? 0 (prm001 prm000) 11(? ti000 ??)16 ? ???? 00(tmc00 ? 3 ? 2 (tmc003 tmc002) 11 ????? tm00 cr000(inttm000) ???? ? ti00 ???? ti00 (tmc003 tmc002 = 10 ?) ??? ?/ ??? ? inttm000 ?? ? inttm000 ??? (??) = ??? (cr000 ?? + 1) ??/ ????? 1 ? ? inttm000 ??? (? 1 ) = ??? (cr000 ?? + 2) ??? f prs ?? ti000 ?????? ??? ? 1. i/o ?? 6.3 (5) ???? 3(pm3) 2. inttm000 ?? ? ? ? 6-19. ????? 16-bit counter (tm00) cr000 register operable bits tmc003, tmc002 clear match signal inttm000 signal edge detection ti000 pin output controller to00 output to00 pin f prs r01uh0312cj0110 rev.1.10 128 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-20. ??????? (1/2) (a) 16 ????? 00(tmc00) 00001100 tmc003 tmc002 tmc001 ovf00 clears and starts on match between tm00 and cr000. (b) ? / ???? 00(crc00) 00000000 crc002 crc001 crc000 cr000 used as compare register (c) 16 ??? 00(toc00) 0 0 0 0/1 0/1 lvr00 lvs00 toc004 ospe00 ospt00 toc001 toe00 0/1 0/1 0/1 0: disables to00 output 1: enables to00 output 00: does not invert to00 output on match between tm00 and cr000/cr010. 01: inverts to00 output on match between tm00 and cr000. 10: inverts to00 output on match between tm00 and cr010. 11: inverts to00 output on match between tm00 and cr000/cr010. specifies initial value of to00 output f/f (d) ????? 00(prm00) 0 0 0/1 0/1 0 3 2 prm001 prm000 es110 es100 es010 es000 selects count clock (specifies valid edge of ti000). 00: falling edge detection 01: rising edge detection 10: setting prohibited 11: both edges detection 011 r01uh0312cj0110 rev.1.10 129 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-20. ??????? (2/2) (e) 16 ? / 00(tm00) ?? tm00 ?? (f) 16 ?? / ??? 000(cr000) cr000 ? m???(m + 1) ??(inttm000) ? cr000 ? 0000h (g) 16 ? / ??? 010(cr010) ??????? cr010 cr010 ?? tm00 ????? (inttm010) ??????(tmmk010) r01uh0312cj0110 rev.1.10 130 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-21. ????? tm00 register 0000h operable bits (tmc003, tmc002) 11 00 n n n tmc003, tmc002 bits = 11 tmc003, tmc002 bits = 00 register initial setting prm00 register, crc00 register, toc00 register note , cr000 register, port setting start stop <1> <2> compare match interrupt (inttm000) compare register (cr000) to00 output control bits (toc004, toc001, toe00) to00 output n 00 initial setting of these registers is performed before setting the tmc003 and tmc002 bits to 11. starts count operation the counter is initialized and counting is stopped by clearing the tmc003 and tmc002 bits to 00. <1> count operation start flow <2> count operation stop flow ? toc00 ????? 6.3 (3) 16 ??? 00(toc00) r01uh0312cj0110 rev.1.10 131 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 6.4.4 ? ti000 ??? 16 ????? 00(tmc00) ? 3 ? 2 tmc003 tmc002) 10(? ti000 ????/ ???( prm00 )? tm00 ?? ti000 ??tm00 ? 0000h ??? ti000 ?? tm00 ti000 ?? tm00 ???? cr000 cr010 ?????? (a) cr000 cr010 ??? tm00 ? cr000 cr010 ??? inttm000 inttm010 ?? (b) cr000 cr010 ?? ? ti010 ?? ti000 ??tm00 ??? cr000 inttm000 ?? ? ti000 ?tm00 ??? cr010 inttm010 ????? ? 0000h ? ?? ti000 ? (prm001 prm000 = 11) prm001 prm000 = 11 ? ,tm00 ? ? 1. i/o ?? 6.3 (5) ???? 3(pm3) 2. inttm000 ?? ? ? (1) ? ti000 ????? (cr000: ??? , cr010: ??? ) ? 6-22. ? ti000 ?????? (cr000: ??? , cr010: ??? ) timer counter (tm00) clear output controller edge detection compare register (cr010) match signal match signal interrupt signal (inttm000) interrupt signal (inttm010) ti000 pin compare register (cr000) operable bits tmc003, tmc002 count clock to00 output to00 pin r01uh0312cj0110 rev.1.10 132 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-23. ? ti000 ??????? (cr000: ??? , cr010: ??? ) (a) toc00 = 13h, prm00 = 10h, crc00 = 00h, tmc00 = 08h tm00 register 0000h operable bits (tmc003, tmc002) count clear input (ti000 pin input) compare register (cr000) compare match interrupt (inttm000) compare register (cr010) compare match interrupt (inttm010) to00 output m 10 m nn nn mm 00 n m (b) toc00 = 13h, prm00 = 10h, crc00 = 00h, tmc00 = 0ah tm00 register 0000h operable bits (tmc003, tmc002) count clear input (ti000 pin input) compare register (cr000) compare match interrupt (inttm000) compare register (cr010) compare match interrupt (inttm010) to00 output m 10 m nn nn mm 00 n m 16 ??? 00 (tmc00) 1 ?? (a) (b) (a) tm00 ????? 4 ? to00 ? (b) tm00 ???? ti000 ??? to00 ? r01uh0312cj0110 rev.1.10 133 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 (2) ? ti000 ????? (cr000: ??? , cr010: ?? ) ? 6-24. ? ti000 ?????? (cr000: ??? , cr010: ?? ) timer counter (tm00) clear output controller edge detector capture register (cr010) capture signal match signal interrupt signal (inttm000) interrupt signal (inttm010) ti000 pin compare register (cr000) operable bits tmc003, tmc002 count clock to00 pin to00 output ? 6-25. ? ti000 ??????? (cr000: ??? , cr010: ?? ) (1/2) (a) toc00 = 13h, prm00 = 10h, crc00 = 04h, tmc00 = 08h, cr000 = 0001h tm00 register 0000h operable bits (tmc003, tmc002) capture & count clear input (ti000 pin input) compare register (cr000) compare match interrupt (inttm000) capture register (cr010) capture interrupt (inttm010) to00 output 0001h 10 q p n m s 00 0000h m n s p q ?????? to00 ? ti000 ???? cr010 tm00 (0000h) tm00 ?? 0001h ? ???(inttm000) ? to00 r01uh0312cj0110 rev.1.10 134 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-25. ? ti000 ??????? (cr000: ??? , cr010: ?? ) (2/2) (b) toc00 = 13h, prm00 = 10h, crc00 = 04h, tmc00 = 0ah, cr000 = 0003h tm00 register 0000h operable bits (tmc003, tmc002) capture & count clear input (ti000 pin input) compare register (cr000) compare match interrupt (inttm000) capture register (cr010) capture interrupt (inttm010) to00 output 0003h 0003h 10 q p n m s 00 0000h m 4444 ns p q ????? to00 cr000 ? 4 ????? ti000 ????? cr010 ?? (inttm010) tm00 ? 0000h ? to00 ?tm00 ?? ?0003h? ? 4 ?????? (inttm000) ? to00 r01uh0312cj0110 rev.1.10 135 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 (3) ? ti000 ???? (cr000: ?? , cr010: ??? ) ? 6-26. ? ti000 ?????? (cr000: ?? , cr010: ??? ) timer counter (tm00) clear output controller edge detection capture register (cr000) capture signal match signal interrupt signal (inttm010) interrupt signal (inttm000) ti000 pin compare register (cr010) operable bits tmc003, tmc002 count clock to00 pin to00 output r01uh0312cj0110 rev.1.10 136 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-27. ? ti000 ??????? (cr000: ?? , cr010: ??? ) (1/2) (a) toc00 = 13h, prm00 = 10h, crc00 = 03h, tmc00 = 08h, cr010 = 0001h tm00 register 0000h operable bits (tmc003, tmc002) capture & count clear input (ti000 pin input) capture register (cr000) capture interrupt (inttm000) compare register (cr010) compare match interrupt (inttm010) to00 output 10 p n m s 00 l 0001h 0000h mns p ?????? to00 ? ti000 ??tm00 ? ti000 ?????? cr000 ?/ ???? 00(crc00) ? 1 (crc001) 1 ? ti000 ????? tm00 ?? cr000 ??(inttm000) ti010 ?? inttm000 ?? inttm000 ?? r01uh0312cj0110 rev.1.10 137 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-27. ? ti000 ??????? (cr000: ?? , cr010: ??? ) (2/2) (b) toc00 = 13h, prm00 = 10h, crc00 = 03h, tmc00 = 0ah, cr010 = 0003h tm00 register 0000h operable bits (tmc003, tmc002) capture & count clear input (ti000 pin input) capture register (cr000) capture interrupt (inttm000) compare register (cr010) compare match interrupt (inttm010) to00 output 0003h 0003h 10 p n m s 00 4444 l 0000h m n s p ????? to00 cr010 ? 4 ????? ti000 ??tm00 (0000h) ti000 ?????? cr000 ti000 ?? tm00 ??? (cr010) ??to00 ? 0000h ?? to00 ? ?/ ???? 00(crc00) ? 1 (crc001) 1 ? ti000 ????? tm00 ?? cr000 ??(inttm000) ti010 ?? nttm000 ? ? inttm000 ?? r01uh0312cj0110 rev.1.10 138 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 (4) ? ti000 ????? (cr000: ?? , cr010: ??? ) ? 6-28. ? ti000 ?????? (cr000: ?? , cr010: ?? ) timer counter (tm00) clear output controller capture register (cr000) capture signal capture signal interrupt signal (inttm010) interrupt signal (inttm000) capture register (cr010) operable bits tmc003, tmc002 count clock edge detection ti000 pin edge detection ti010 pin note selector to00 output note to00 pin note ? ? ti010 ?????? (to00) ? 6-29. ? ti000 ??????? (cr000: ?? , cr010: ?? ) (1/3) (a) toc00 = 13h, prm00 = 30h, crc00 = 05h, tmc00 = 0ah tm00 register 0000h operable bits (tmc003, tmc002) capture & count clear input (ti000 pin input) capture register (cr000) capture interrupt (inttm000) capture register (cr010) capture interrupt (inttm010) to00 output 10 r s t o l m n p q 00 l 0000h 0000h lm nopqrs t ?? ti000 ??????? cr010 tm00 ?? to00 ti010 ???(inttm000) ? inttm000 ?? r01uh0312cj0110 rev.1.10 139 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-29. ? ti000 ??????? (cr000: ?? , cr010: ?? ) (2/3) (b) toc00 = 13h, prm00 = c0h, crc00 = 05h, tmc00 = 0ah tm00 register 0000h operable bits (tmc003, tmc002) capture trigger input (ti010 pin input) capture register (cr000) capture interrupt (inttm000) capture & count clear input (ti000) capture register (cr010) capture interrupt (inttm010) 10 r s t o l m n p q 00 ffffh l l 0000h 0000h lmn o pq r s t ?? ti010 ?????? cr000 ?? ti000 ? r01uh0312cj0110 rev.1.10 140 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-29. ? ti000 ??????? (cr000: ?? , cr010: ?? ) (3/3) (c) toc00 = 13h, prm00 = 00h, crc00 = 07h, tmc00 = 0ah tm00 register 0000h operable bits (tmc003, tmc002) capture & count clear input (ti000 pin input) capture register (cr000) capture register (cr010) capture interrupt (inttm010) capture input (ti010) capture interrupt (inttm000) 0000h 10 p o m q r t s w n l 00 l l ln r pt 0000h moq s w ?? ti000 ??? ? crc00 ti000 ???()?? cr000 ti000 ? ?? cr010 ?????????? ? ?? = [cr010 ?] ? [cr000 ?] [ ?] ? ?? = [cr000 ?] [ ?] ti000 ???? cr000 ?? inttm000 ?? inttm010 ?? ? cr000 010 ? ??????? 00(prm00) ? 6 ? 5 (es110 es100) ? ti010 ? ?? inttm000 ?? ti000 ??? inttm000 r01uh0312cj0110 rev.1.10 141 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-30. ? ti000 ??????? (1/2) (a) 16 ????? 00(tmc00) 0000100/10 tmc003 tmc002 tmc001 ovf00 clears and starts at valid edge input of ti000 pin. 0: inverts to00 output on match between tm00 and cr000/cr010. 1: inverts to00 output on match between tm00 and cr000/cr010 and valid edge of ti000 pin. (b) ? / ???? 00(crc00) 000000/10/10/1 crc002 crc001 crc000 0: cr000 used as compare register 1: cr000 used as capture register 0: cr010 used as compare register 1: cr010 used as capture register 0: ti010 pin is used as capture trigger of cr000. 1: reverse phase of ti000 pin is used as capture trigger of cr000. (c) 16 ??? 00(toc00) 0 0 0 0/1 0/1 lvr00 lvs00 toc004 ospe00 ospt00 toc001 toe00 0: disables to00 output note 1: enables to00 output 00: does not invert to00 output on match between tm00 and cr000/cr010. 01: inverts to00 output on match between tm00 and cr000. 10: inverts to00 output on match between tm00 and cr010. 11: inverts to00 output on match between tm00 and cr000/cr010. specifies initial value of to00 output f/f 0/1 0/1 0/1 ? ? ti010 ??????(to00) r01uh0312cj0110 rev.1.10 142 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-30. ? ti000 ??????? (2/2) (d) ????? 00(prm00) 0/1 0/1 0/1 0/1 0 3 2 prm001 prm000 es110 es100 es010 es000 count clock selection (setting ti000 valid edge is prohibited) 00: falling edge detection 01: rising edge detection 10: setting prohibited 11: both edges detection (setting prohibited when crc001 = 1) 00: falling edge detection 01: rising edge detection 10: setting prohibited 11: both edges detection 0 0/1 0/1 (e) 16 ? / 00(tm00) ?? tm00 ?? (f) 16 ?? / ??? 000(cr000) ???? tm00 ???? (inttm000) tm00 ? ???? ti000 ti010 ? ???? tm00 ? cr000 ? ? ti010 ??????(to00) (g) 16 ? / ??? 010(cr010) ???? tm00 ???? (inttm010) tm00 ? ???? ti000 ???? tm00 ? cr010 r01uh0312cj0110 rev.1.10 143 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-31. ? ti000 ????? tm00 register 0000h operable bits (tmc003, tmc002) count clear input (ti000 pin input) compare register (cr000) compare match interrupt (inttm000) compare register (cr010) compare match interrupt (inttm010) to00 output m 10 m n n n n mmm 00 <1> <2> <2> <2> <3> <2> 00 n tmc003, tmc002 bits = 10 edge input to ti000 pin register initial setting prm00 register, crc00 register, toc00 register note , cr000, cr010 registers, tmc00.tmc001 bit, port setting initial setting of these registers is performed before setting the tmc003 and tmc002 bits to 10. starts count operation when the valid edge is input to the ti000 pin, the value of the tm00 register is cleared. start <1> count operation start flow <2> tm00 register clear & start flow tmc003, tmc002 bits = 00 the counter is initialized and counting is stopped by clearing the tmc003 and tmc002 bits to 00. stop <3> count operation stop flow ? toc00 ????? 6.3 (3) 16 ??? 00(toc00) r01uh0312cj0110 rev.1.10 144 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 6.4.5 ? 16 ?????? 3 ? 2 ?01 ????16 ?/ ? 00 ?? ffffh ????? (ovf00) 1 tm00 ?? ? clr ?? ovf00 ? ?? ? cr000 cr010 ??? ? cr000 cr010 ??????? ? cr000 cr010 ?? ? 1. i/o ?? 6.3 (5) ???? 3(pm3) 2. inttm000 ?? ? ? (1) ? (cr000: ?? , cr010: ??? ) ? 6-32. ?????? (cr000: ??? , cr010: ??? ) timer counter (tm00) output controller compare register (cr010) match signal match signal interrupt signal (inttm000) interrupt signal (inttm010) compare register (cr000) operable bits tmc003, tmc002 count clock to00 pin to00 output r01uh0312cj0110 rev.1.10 145 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-33. ????? (cr000: ??? , cr010: ??? ) ? toc00 = 13h, prm00 = 00h, crc00 = 00h, tmc00 = 04h ffffh tm00 register 0000h operable bits (tmc003, tmc002) compare register (cr000) compare match interrupt (inttm000) compare register (cr010) compare match interrupt (inttm010) to00 output ovf00 bit 01 m n m n m n m n 00 00 n 0 write clear 0 write clear 0 write clear 0 write clear m ?????? 2 ??? ? tm00 ?? cr000 cr010 ???? to00 ??????? inttm000 inttm010 ?? (2) ? (cr000: ??? , cr010: ?? ) ? 6-34. ????? (cr000: ??? , cr010: ?? ) timer counter (tm00) output controller edge detection capture register (cr010) capture signal match signal interrupt signal (inttm000) interrupt signal (inttm010) ti000 pin compare register (cr000) operable bits tmc003, tmc002 count clock to00 pin to00 output r01uh0312cj0110 rev.1.10 146 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-35. ????? (cr000: ??? , cr010: ?? ) ? toc00 = 13h, prm00 = 10h, crc00 = 04h, tmc00 = 04h ffffh tm00 register 0000h operable bits (tmc003, tmc002) capture trigger input (ti000) compare register (cr000) compare match interrupt (inttm000) capture register (cr010) capture interrupt (inttm010) to00 output overflow flag (ovf00) 0 write clear 0 write clear 0 write clear 0 write clear 01 m n s p q 00 0000h 0000h mn s p q ??????????????? ?? tm00 ?? cr000 ??????? inttm000 ??? to00 ??? ti000 ? inttm010 ??? tm00 ?? cr010 r01uh0312cj0110 rev.1.10 147 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 (3) ? (cr000: ?? , cr010: ??? ) ? 6-36. ????? (cr000: ?? , cr010: ?? ) timer counter (tm00) capture register (cr000) capture signal capture signal interrupt signal (inttm010) interrupt signal (inttm000) capture register (cr010) operable bits tmc003, tmc002 count clock edge detection ti000 pin edge detection ti010 pin selector ? ??? cr000 cr010 ????? to00 ? 16 ????? 00(tmc00) ? 1 ?1 ? ti000 ?? ? r01uh0312cj0110 rev.1.10 148 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-37. ????? (cr000: ?? , cr010: ?? ) (1/2) (a) toc00 = 13h, prm00 = 50h, crc00 = 05h, tmc00 = 04h ffffh tm00 register 0000h operable bits (tmc003, tmc002) capture trigger input (ti000) capture register (cr010) capture interrupt (inttm010) capture trigger input (ti010) capture register (cr000) capture interrupt (inttm000) overflow flag (ovf00) 01 m a b c de n s p q 00 0 write clear 0 write clear 0 write clear 0 write clear 0000h abc d e 0000h mn s p q ???????????????? ti000 ??? cr010 ti010 ??? cr000 r01uh0312cj0110 rev.1.10 149 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-37. ????? (cr000: ?? , cr010: ?? ) (2/2) (b) toc00 = 13h, prm00 = c0h, crc00 = 05h, tmc00 = 04h ffffh tm00 register 0000h operable bits (tmc003, tmc002) capture trigger input (ti010) capture register (cr000) capture interrupt (inttm000) capture trigger input (ti000) capture register (cr010) capture interrupt (inttm010) 01 l m p s n o r q t 00 0000h 0000h lmn o pq r s t l l ????? ti010 ????? cr000 cr000 cr010 ???? ti010 ???? cr010 r01uh0312cj0110 rev.1.10 150 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-38. ?????? (1/2) (a) 16 ????? 00(tmc00) 0000010/10 tmc003 tmc002 tmc001 ovf00 free-running timer mode 0: inverts to00 output on match between tm00 and cr000/cr010. 1: inverts to00 output on match between tm00 and cr000/cr010 valid edge of ti000 pin. (b) ? / ???? 00(crc00) 000000/10/10/1 crc002 crc001 crc000 0: cr000 used as compare register 1: cr000 used as capture register 0: cr010 used as compare register 1: cr010 used as capture register 0: ti010 pin is used as capture trigger of cr000. 1: reverse phase of ti000 pin is used as capture trigger of cr000. (c) 16 ??? 00(toc00) 0 0 0 0/1 0/1 lvr00 lvs00 toc004 ospe00 ospt00 toc001 toe00 0: disables to00 output 1: enables to00 output 00: does not invert to00 output on match between tm00 and cr000/cr010. 01: inverts to00 output on match between tm00 and cr000. 10: inverts to00 output on match between tm00 and cr010. 11: inverts to00 output on match between tm0n and cr000/cr010. specifies initial value of to00 output f/f 0/1 0/1 0/1 r01uh0312cj0110 rev.1.10 151 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-38. ?????? (2/2) (d) ????? 00(prm00) 0/1 0/1 0/1 0/1 0 3 2 prm001 prm000 es110 es100 es010 es000 count clock selection (setting ti000 valid edge is prohibited) 00: falling edge detection 01: rising edge detection 10: setting prohibited 11: both edges detection (setting prohibited when crc001 = 1) 00: falling edge detection 01: rising edge detection 10: setting prohibited 11: both edges detection 0 0/1 0/1 (e) 16 ? / 00(tm00) ?? tm00 ?? (f) 16 ?? / ??? 000(cr000) ???? tm00 ???? (inttm000) tm00 ? ???? ti000 ti010 ???? tm00 ? cr000 (g) 16 ? / ??? 010(cr010) ???? tm00 ???? (inttm010) tm00 ? ???? ti000 ???? tm00 ? cr010 r01uh0312cj0110 rev.1.10 152 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-39. ???? ffffh tm00 register 0000h operable bits (tmc003, tmc002) compare register (cr000) compare match interrupt (inttm000) compare register (cr010) compare match interrupt (inttm010) timer output control bits (toe00, toc004, toc001) to00 output m 01 n n n n m m m 00 <1> <2> 00 n tmc003, tmc002 bits = 0, 1 register initial setting prm00 register, crc00 register, toc00 register note , cr000/cr010 register, tmc00.tmc001 bit, port setting initial setting of these registers is performed before setting the tmc003 and tmc002 bits to 01. starts count operation start <1> count operation start flow tmc003, tmc002 bits = 0, 0 the counter is initialized and counting is stopped by clearing the tmc003 and tmc002 bits to 00. stop <2> count operation stop flow ? toc00 ????? 6.3 (3) 16 ??? 00(toc00) r01uh0312cj0110 rev.1.10 153 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 6.4.6 ppg 16 ????? 00(tmc00) ? 3 ? 2 (tmc003 tmc002) 11tm00 cr000 ? ??? cr000 ??? to00 ? cr010 ??? ppg (? )?? ppg ???? ? ? cr000 ?? 1 ? ? ?? = (cr010 ?? + 1) / (cr000 ?? + 1) ? ????? (cr010 ? ) 6.5.1 tm00 ? cr010 ? 1. i/o ?? 6.3 (5) ???? 3(pm3) 2. inttm000 ?? ? ? ? 6-40.ppg ??? timer counter (tm00) clear output controller compare register (cr010) match signal match signal interrupt signal (inttm000) interrupt signal (inttm010) compare register (cr000) operable bits tmc003, tmc002 count clock to00 pin to00 output r01uh0312cj0110 rev.1.10 154 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-41. ppg ??? (1/2) (a) 16 ????? 00(tmc00) 00001100 tmc003 tmc002 tmc001 ovf00 clears and starts on match between tm00 and cr000. (b) ? / ???? 00(crc00) 00000000 crc002 crc001 crc000 cr000 used as compare register cr010 used as compare register (c) 16 ??? 00(toc00) 0 0 0 1 0/1 lvr00 lvs00 toc004 ospe00 ospt00 toc001 toe00 enables to00 output 11: inverts to00 output on match between tm00 and cr000/cr010. 00: disables one-shot pulse output specifies initial value of to00 output f/f 0/1 1 1 (d) ????? 00(prm00) 00000 3 2 prm001 prm000 es110 es100 es010 es000 selects count clock 0 0/1 0/1 r01uh0312cj0110 rev.1.10 155 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-41. ppg ??? (2/2) (e) 16 ? / 00(tm00) ?? tm00 ?? (f) 16 ?? / ??? 000(cr000) ?? tm00 ????? (inttm000) tm00 ??? (g) 16 ? / ??? 010(cr010) ?? tm00 ????? (inttm010) tm00 ? ? cr000 cr010 0000h cr010 < cr000 ffffh ? r01uh0312cj0110 rev.1.10 156 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-42. ppg ? tm00 register 0000h operable bits (tmc003, tmc002) compare register (cr000) compare match interrupt (inttm000) compare register (cr010) compare match interrupt (inttm010) timer output control bits (toe00, toc004, toc001) to00 output m 11 m m m n n n 00 <1> n + 1 <2> 00 n tmc003, tmc002 bits = 11 register initial setting prm00 register, crc00 register, toc00 register note , cr000, cr010 registers, port setting initial setting of these registers is performed before setting the tmc003 and tmc002 bits. starts count operation start <1> count operation start flow tmc003, tmc002 bits = 00 the counter is initialized and counting is stopped by clearing the tmc003 and tmc002 bits to 00. stop <2> count operation stop flow n + 1 n + 1 m + 1 m + 1 m + 1 ? toc00 ????? 6.3 (3) 16 ??? 00(toc00) ? ppg = (m + 1) ? ppg ?? = (n + 1)/(m + 1) r01uh0312cj0110 rev.1.10 157 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 6.4.7 ? 16 ????? 00(tmc00) ? 3 ? 2 (tmc003 tmc002) 01 ?? ?10 ? ti000 ????? ? 16 ??? 00(toc00) ? 5 (ospe00) 1 ^ ??? toc00 ? 6 (ospt00) 1 ti000 ? tm00 ? to00 ?? cr000 cr010 ???^ ? 1. ????? ospt00 ?1? ti000 ??? ???^ 2. ospt00 ?1? ??? ti000 ????????? ?? ? 1. i/o ?? 6.3 (5) ???? 3(pm3) 2. inttm000 ?? ? ? ? 6-43. ??? timer counter (tm00) output controller compare register (cr010) match signal match signal interrupt signal (inttm000) interrupt signal (inttm010) compare register (cr000) operable bits tmc003, tmc002 count clock ti000 edge detection ospt00 bit ospe00 bit clear to00 pin to00 output r01uh0312cj0110 rev.1.10 158 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-44. ??? (1/2) (a) 16 ????? 00(tmc00) 00000/10/100 tmc003 tmc002 tmc001 ovf00 01: free running timer mode 10: clear and start mode by valid edge of ti000 pin. (b) ? / ???? 00(crc00) 00000000 crc002 crc001 crc000 cr000 used as compare register cr010 used as compare register (c) 16 ??? 00(toc00) 0 0/1 1 1 0/1 lvr00 lvs00 toc004 ospe00 ospt00 toc001 toe00 enables to00 output inverts to00 output on match between tm00 and cr000/cr010. specifies initial value of to00 output enables one-shot pulse output software trigger is generated by writing 1 to this bit (operation is not affected even if 0 is written to it). 0/1 1 1 (d) ????? 00(prm00) 00000 3 2 prm001 prm000 es110 es100 es010 es000 selects count clock 0 0/1 0/1 r01uh0312cj0110 rev.1.10 159 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-44. ??? (2/2) (e) 16 ? / 00(tm00) ?? tm00 ?? (f) 16 ?? / ??? 000(cr000) ?????tm00 ? cr000 ????? (inttm000) ? to00 ? (g) 16 ? / ??? 010(cr010) ?????tm00 ? cr010 ????? (inttm010) ? to00 ? ? ? cr000 cr010 ??? r01uh0312cj0110 rev.1.10 160 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-45. ? (1/2) ffffh tm00 register 0000h operable bits (tmc003, tmc002) one-shot pulse enable bit (ospe0) one-shot pulse trigger bit (ospt0) one-shot pulse trigger input (ti000 pin) overflow plug (ovf00) compare register (cr000) compare match interrupt (inttm000) compare register (cr010) compare match interrupt (inttm010) to00 output to00 output control bits (toe00, toc004, toc001) n m n ? m n ? m 01 or 10 00 00 n n n m m m m + 1 m + 1 <1> <2> <2> <3> to00 output level is not inverted because no one- shot trigger is input. ? ?? = (m + 1) ? ? ?? = (n ? m) ? r01uh0312cj0110 rev.1.10 161 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-45. ? (2/2) tmc003, tmc002 bits = 01 or 10 register initial setting prm00 register, crc00 register, toc00 register note , cr000, cr010 registers, port setting initial setting of these registers is performed before setting the tmc003 and tmc002 bits. starts count operation start <1> count operation start flow <2> one-shot trigger input flow tmc003, tmc002 bits = 00 the counter is initialized and counting is stopped by clearing the tmc003 and tmc002 bits to 00. stop <3> count operation stop flow toc00.ospt00 bit = 1 or edge input to ti000 pin write the same value to the bits other than the ospt00 bit. ? toc00 ????? 6.3 (3) 16 ??? 00(toc00) r01uh0312cj0110 rev.1.10 162 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 6.4.8 ? tm00 ? ti000 ti010 ??? ???? 16 ?/ ? 0 ti000 ???? ?????? 16 ????? 00(tmc00) 0 (ovf00) ?1 ?? ? 6-46. ? ( ??? ) ??? timer counter (tm00) capture register (cr000) capture signal capture signal interrupt signal (inttm010) interrupt signal (inttm000) capture register (cr010) operable bits tmc003, tmc002 count clock edge detection ti000 pin edge detection ti010 pin selector ? 6-47. ??? ? ti000 ???? timer counter (tm00) capture register (cr000) capture signal capture signal interrupt signal (inttm010) interrupt signal (inttm000) capture register (cr010) operable bits tmc003, tmc002 count clock edge detection ti000 pin edge detection ti010 pin clear selector r01uh0312cj0110 rev.1.10 163 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ??? ? ?? ti000 ti010 ??? (???) ? ?? ti000 ??? (???) ? ?? ti000 ??? (? ti000 ???? )) ? 1. i/o ?? 6.3 (5) ???? 3(pm3) 2. inttm000 ?? ? ? (1) ?? ti000 ti010 ??? ( ??? ) ???(tmc003 tmc002 = 01) ti000 ??? tm00 ?? cr010 ti010 ??? tm00 ?? cr000 ? ti000 ti010 ?? ? ???????????????????? ?????????????????? (psw) ? 0 (cy) 1 cy ??? 16 ????? 00(tmc00) 0 (ovf00) ? ? 6-48. ??? (1) ? tmc00 = 04h, prm00 = f0h, crc00 = 05h ffffh tm00 register 0000h operable bits (tmc003, tmc002) capture trigger input (ti000) capture register (cr010) capture interrupt (inttm010) capture trigger input (ti010) capture register (cr000) capture interrupt (inttm000) overflow flag (ovf00) 01 m a b c de n s p q 00 0 write clear 0 write clear 0 write clear 0 write clear 0000h abc d e 0000h mn s p q r01uh0312cj0110 rev.1.10 164 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 (2) ?? ti000 ??? ( ??? ) ??? (tmc003 tmc002 = 01) ti000 ??? tm00 ?? cr00 ti000 ??? tm00 ?? cr010 ????????????????n?? ???????????? ???????????????? (psw) ? 0 (cy) ?1? cy ??? 16 ????? 00(tmc00) 0 (ovf00) ? ? 6-49. ??? (2) ? tmc00 = 04h, prm00 = 10h, crc00 = 07h ffffh tm00 register 0000h operable bits (tmc003, tmc002) capture trigger input (ti000) capture register (cr000) capture register (cr010) capture interrupt (inttm010) overflow flag (ovf00) capture trigger input (ti010) capture interrupt (inttm000) 01 m a b c de n s p q 00 0 write clear 0 write clear 0 write clear 0 write clear 0000h l l abc d e 0000h mn s p q r01uh0312cj0110 rev.1.10 165 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ?? ti000 ??? ( ? ti000 ????? )) ? ti000 ???? (tmc003 tmc002 = 10) ti000 ? ?? tm00 ?? cr000 ti000 ??? tm00 ??? cr010 tm00 (0000h) ? tm00 ? cr010 ?? cr010 ? 10000h ??? 16 ????? 00(tmc00) 0 (ovf00) ? ? 6-50. ??? (3) ? tmc00 = 08h, prm00 = 10h, crc00 = 07h ffffh tm00 register 0000h operable bits (tmc003, tmc002) capture & count clear input (ti000) capture register (cr000) capture register (cr010) capture interrupt (inttm010) overflow flag (ovf00) capture trigger input (ti010) capture interrupt (inttm000) 10 <1> <2> <3> <3> <3> <3> <2> <2> <2> <1> <1> <1> m a b cd n s p q 00 00 0 write clear 0000h l l abc d 0000h mn s p q <1> = (10000h ovf00 ?1 ? + cr010 ??) ? <2> ?? = (10000h ovf00 ?1 ? + cr000 ??) ? <3> ?? = ( ? ??) r01uh0312cj0110 rev.1.10 166 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-51. ???? (1/2) (a) 16 ????? 00(tmc00) 00000/10/100 tmc003 tmc002 tmc001 ovf00 01: free running timer mode 10: clear and start mode entered by valid edge of ti000 pin. (b) ? / ???? 00(crc00) 0000010/11 crc002 crc001 crc000 1: cr000 used as capture register 1: cr010 used as capture register 0: ti010 pin is used as capture trigger of cr000. 1: reverse phase of ti000 pin is used as capture trigger of cr000. (c) 16 ??? 00(toc00) 00000 lvr00 lvs00 toc004 ospe00 ospt00 toc001 toe00 000 (d) ????? 00(prm00) 0/1 0/1 0/1 0/1 0 3 2 prm001 prm000 es110 es100 es010 es000 selects count clock (setting valid edge of ti000 is prohibited) 00: falling edge detection 01: rising edge detection 10: setting prohibited 11: both edges detection (setting when crc001 = 1 is prohibited) 00: falling edge detection 01: rising edge detection 10: setting prohibited 11: both edges detection 0 0/1 0/1 r01uh0312cj0110 rev.1.10 167 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-51. ???? (2/2) (e) 16 ? / 00(tm00) ?? tm00 ?? (f) 16 ?? / ??? 000(cr000) ???? ti000 ti010 ???? tm00 ? cr000 (g) 16 ? / ??? 010(cr010) ??? ti000 ????? tm00 ? cr010 r01uh0312cj0110 rev.1.10 168 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-52. ?? (1/2) (a) ???? ffffh tm00 register 0000h operable bits (tmc003, tmc002) capture trigger input (ti000) capture register (cr010) capture interrupt (inttm010) capture trigger input (ti010) capture register (cr000) capture interrupt (inttm000) 01 00 00 0000h 0000h <1> <2> <2> <2> <2> <2> <2> <2> <2> <2> <3> d 00 d 01 d 02 d 03 d 04 d 10 d 11 d 12 d 13 d 10 d 11 d 12 d 13 d 00 d 01 d 02 d 03 d 04 (b) ? ti000 ???? ffffh tm00 register 0000h operable bits (tmc003, tmc002) capture & count clear input (ti000) capture register (cr000) capture interrupt (inttm000) capture register (cr010) capture interrupt (inttm010) 10 l 00 00 0000h 0000h <1> <2> <2> <2> <2> <2> <2> <2> <2> <3> <2> d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 d 8 d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 d 8 r01uh0312cj0110 rev.1.10 169 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 ? 6-52. ?? (2/2) <2> capture trigger input flow edge detection of ti000, ti010 pins calculated pulse width from capture value stores count value to cr000, cr010 registers generates capture interrupt note tmc003, tmc002 bits = 01 or 10 register initial setting prm00 register, crc00 register, port setting initial setting of these registers is performed before setting the tmc003 and tmc002 bits. starts count operation start <1> count operation start flow tmc003, tmc002 bits = 00 the counter is initialized and counting is stopped by clearing the tmc003 and tmc002 bits to 00. stop <3> count operation stop flow ? ? ti000 ? cr000 ??? (inttm000) r01uh0312cj0110 rev.1.10 170 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 6.5 tm00 ? 6.5.1 tm00 ? cr010 ??tm00 (tmc003 c002 = 00 ?) ?? cr000 cr010 ??? ? cr010 ppg ?????2 tm00 ?? cr010 cr010 ????? cr010 00 ? cr010 ????? cr00 00 ? cr010 tm00 cr000 tm00 ????? ? cr010 ??s <1> ? inttm010(tmmk010 = 1) <2> tm00 ? cr010 ?? (toc004 = 0) ???? <3> ? cr010 ? <4> ?? tm00 ?? <5> tm00 ? cr010 ?? (toc004 = 1) ???? <6> inttm010(tmif010 = 0) ??? <7> inttm010(tmmk010 = 0) ? tmif010 tmmk010 ? ?? 6.5.2 lvs00 lvr00 (1) lvs00 lvr00 lvs00 lvr00 to00 ?????? (tmc003 tmc002 = 00) ?? ???lvs00 lvr00 (00)( ???? ) ??? lvs00 lvr00 2013.11.29 0 0 ???? 0 1 ?? 1 0 ??? 1 1 ? r01uh0312cj0110 rev.1.10 171 pd79f7023, 79f7024 16 ? / ? 00 (2) lvs00 lvr00 2 lvs00 lvr00 ? 6-53. lvs00 lvr00 ? setting toc00.ospe00, toc004, toc001 bits setting toc00.toe00 bit setting toc00.lvs00, lvr00 bits setting tmc00.tmc003, tmc002 bits <3> enabling timer operation <2> setting of timer output f/f <1> setting of timer output operation ? ? <1> <2> <3> lvs00 lvr00 <1> ? <3> ?? <2> ? 6-54. lvr00 lvs00 ?? toc00.lvs00 bit toc00.lvr00 bit operable bits (tmc003, tmc002) to00 output inttm000 signal <1> 00 <2> <1> <3> <4> <4> <4> 01, 10, or 11 <1> lvs00 lvr00 = 10 ?to00 ?? <2> lvs00 lvr00 = 01 ?to00 ?? (? lvs00 lvr00 (00) ??? ) <3> tmc002 01 10 11 ?????? lvs00 lvr00 10 to00 ???????? tmc003 tmc002 =00 ? lvs00 lvr00 <4> ??(inttm000) ?? to00 ?? r01uh0312cj0110 rev.1.10 172 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 6.6 16 ? / ? 00 ? (1) 16 ? / ?? 00 ? ? 6-3 ? 6-3. 16 ? / ? 00 ? ? ? ? ?? ? ti000 ??? ti010 ?????? (to00) (toc00 = 00h) ? ? 0000h cp010 < cr000 ffffh ppg ? cr000 cp010 ?? ? ???? (to00)(toc00 = 00h) (2) ? ? tm00 I????????? ? 6-55. tm00 ? 0000h timer start 0001h 0002h 0003h 0004h count pulse tm00 count value (3) cr000 cr010 (tm00 cr000 ????? ) cr000 cr010 0000h ?(tm00 ???? ) r01uh0312cj0110 rev.1.10 173 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 (4) ???? (a) ? cr000/cr010 ??? ti000/ti010 ? ti000 ??? cr010 ?? ?? cr000/cr010 ???? ti000/ti010 ??? (inttm000/inttm010)( ti000 ?????? ) ti000/ti010 ?????? inttm000/inttm010 ??? cr000/cr010 ? ? 6-56. ???? n n + 1 n + 2 x n + 1 m m + 1 m + 2 count pulse tm00 count value edge input inttm010 value captured to cr010 capture read signal capture operation is performed but read value is not guaranteed. capture operation (b) 16 ? / ? 00 ????? cr000 cr010 ? (5) ? ???(tmc003 tmc002 = 00) ??? es000 es001 ti000 ?? (6) ???????????? r01uh0312cj0110 rev.1.10 174 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 (7) ovf00 ?? (a) ovf00 ? (1) tm00 ? ovf00 ?1 tm00 cr000 ?????? cr000 ? ffffh tm00 cr000 ??tm00 ?ffffh? ? ?0000h? ? 6-57. ovf00 ??? fffeh ffffh ffffh 0000h 0001h count pulse tm00 inttm000 ovf00 cr000 (b) ovf00 ? ? tm00 ?????(tm00 ?? 0001h ??) ovf00 ? (0) ovf00 ?1 (8) ???? ti000 ??????? tm00 cr000 ?????^ r01uh0312cj0110 rev.1.10 175 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 (9) ? (a) ? ti000 ? ? ti000 ??? ti000 ???? (b) ? ti010 ti000 ?????? ?????? ti000 ti010 ???? prm00 ? (? 6-7 ) (c) ?? ??????? (inttm000 inttm010) ???? ? 6-7 (d) crc001 ( ?/ ???? 00(crc00) ? 1 ) ?1? ?? ?? ti000 ??? tm00 ? cr000 ????? (inttm000) ? ti010 ???? inttm000 ?? ????? inttm000 ?? (10) ? (a) ? ti000 ti010 ???? , ???? ti000 ti010 ?? 16 ? / ? 00 ? ti000 ti010 ????? ti000 ti010 ??? ???????? (b) ? ti000 ????????????? f prs ? prm00 ?? ti000 ?? 2 ???????? ? 6-7 (11) ? cpu ???????????? ti000/ti010 ??? ? f prs : ???? r01uh0312cj0110 rev.1.10 176 2013.11.29 pd79f7023, 79f7024 16 ? / ? 00 (12) 16 ? / 00(tm00) ? ? tm00 ??????????????? ???????????? ? 6-58. 16 ? / 00(tm00) ?? count clock tm00 count value 0034h 0035h 0036h 0037h 0038h 0039h 003ah 003bh 0034h 0035h 0037h 0038h 003bh read buffer read signal r01uh0312cj0110 rev.1.10 177 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 8 ? / ? 51 7.1 8 ? / ? 51 8 ?/ ? 51 1? (1) ? (2) ?? (3) (4) pwm ? pwm uart0 ??? r01uh0312cj0110 rev.1.10 178 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 7.2 8 ? / ? 51 8 ?/ ? 51 ? 7-1. 8 ? / ? 51 ? ?? 8 ?/ 51 (tm51) ? ti51 ? 8 ???? 51 (cr51) ?? ???? 51(tcl51) 8 ????? 51(tmc51) ???? 3(pm3) ??? 3(p3) 8 ?/ ? 51 ??? 7-1 ? ? 7-1. 8 ?? 51 ?? ti51/toh1/intp0/p30 f prs /2 4 f prs /2 6 f prs /2 8 f prs f prs /2 ovf clear 3 tcl512 tcl511 tcl510 tce51 tmc516 tmc511 level reverse s r inttm51 to uart0 inv q timer output f/f pwm output f/f internal bus mask circuit 8-bit timer counter 51 (tm51) 8-bit timer compare register 51 (cr51) match selector 8-bit timer h1 output timer clock selection register 51 (tcl51) 8-bit timer mode control register 51 (tmc51) selector internal bus selector r01uh0312cj0110 rev.1.10 179 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 (1) 8 ? / 51(tm51) tm51 8 ???? ??? ? 7-2. 8 ? / 51(tm51) ?? ??00 <1> ? <2> tce51 <3> tm51 cr51 ????? tm51 cr51 ?? (2) 8 ???? 51(cr51) ? 8 ?? cr51 cr51 ? 8 ????????(inttm51) cr51 00h ffh ?? ??? crc51 ? 00h ? 7-3. 8 ???? 51(cr51) ?? ? tm51 cr51 ???? (tmc516 = 0 ?? cr51 ? r01uh0312cj0110 rev.1.10 180 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 7.3 8 ? / ? 51 ?? 4 ? 8 ?/ ? 51 ? ???? 51(tcl51) ? 8 ????? 51(tmc51) ? ???? 3(pm3) ? ??? 3 (p3) (1) ???? 51 (tcl51) ? 8 ?? / ? 51 ??? ti51 ? 1 8 ?? tcl51 ???tcl51 (00h) ? 7-4. ???? 51(tcl51) ?? ? ffb2h 00h r/w 7 6 5 4 3 2 1 0 tcl51 0 0 0 0 0 tcl512 tcl511 tcl510 ?? tcl512 tcl511 tcl510 f prs = 2 mhz f prs = 5 mhz f prs = 10 mhz 0 0 0 ti51 ? ? 0 0 1 ti51 ? 0 1 0 f prs 2 mhz 5 mhz 10 mhz 0 1 1 f prs /2 1 mhz 2.5 mhz 5 mhz 1 0 0 f prs /2 4 125 khz 312.5 khz 625 khz 1 0 1 f prs /2 6 31.25 khz 78.13 khz 156.25 khz 1 1 0 f prs /2 8 7.81 khz 19.53 khz 39.06 khz 1 1 1 tmh1 ? stop ????? ti51 ???? ? 1. ? tcl51 ???? 2. ? 3 7 ?0? ? fprs ???? r01uh0312cj0110 rev.1.10 181 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 (2) 8 ????? 51(tmc51) tmc51 ?? 8 ? 51(tm51) ?? 1 8 ?? tmc51 ????? 00h ? 7-5. 8 ????? 51(tmc51) ?? ? ffb3h 00h r/w <7> 6 5 4 3 2 1 0 tmc51 tce51 tmc516 0 0 0 0 tmc511 0 tce51 tm51 0 ????? 1 ? tmc516 tm51 ??? 0 tm51 cr51 ????? 1 pwm( ) ?? ?? (tmc516 = 0) pwm ?? (tmc516 = 1) tmc511 ? f/f ?? 0 ?? ?? 1 ?? ?? ? 1. <1> <2> ????? <1> tmc511, tmc516 ?? <2> tce51 2. tce51 = 1 ?? tmc51 ? pwm ??? tce ? pwm (4) ???? 3(pm3) ? 1 ?? 3 1 8 ?? pm3 ????? ffh p30/ti51/toh1/intp0 ??pm30 ?1? ?p30 r ?0? ??1? ? 7-6. ???? 3(pm3) ?? ? ff23h ffh r/w 7 6 5 4 3 2 1 0 pm3 1 1 1 pm34 pm33 pm32 pm31 pm30 pm3n p3n i/o ??? (n = 0 4) 0 ???? 1 ???? r01uh0312cj0110 rev.1.10 182 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 7.4 8 ? / ? 51 ? 7.4.1 ? 8 ???? 51(cr51) ???????? 8 ? 51(tm51) ?? cr51 ??? tm51 ???? (inttm51) ????? 51(tcl51) ? 0 2 (tcl510 tcl512) ? tm51 ??? <1> ? ? tcl51: ??? ? cr51: ?? ? tmc51: ??? tm51 cr51 ????? (tmc51 = 0000 0b = ) <2> tce51 = 1 ??? <3> tm51 cr51 ??? inttm51(tm51 (00h)) <4> ??? inttm51 ? tce51 ??? ? ?? cr51 ? ? inttm000 ?? ? ? ? 7-7. ?? (1/2) (a) t count clock tm5n count value cr5n tce5n inttm5n count start clear clear 00h 01h n 00h 01h n 00h 01h n n n n n interrupt acknowledged interrupt acknowledged interval time interval time ? 1. ? = (n + 1) t, n = 01h ffh 2. n = 1 r01uh0312cj0110 rev.1.10 183 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 ? 7-7. ?? (2/2) (b) cr51 = 00h ? t interval time count clock tm5n cr5n tce5n inttm5n 00h 00h 00h 00h 00h (c) cr51 = ffh ? t count clock tm5n cr5n tce5n inttm5n 01h feh ffh 00h feh ffh 00h ffh ffh ffh interval time interrupt acknowledged interrupt acknowledged ? n = 1 r01uh0312cj0110 rev.1.10 184 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 7.4.2 ?? ? 8 ? 51(tm51) ??? ti51 ??? ????? 51(tcl51) ?? tm51 ???? tm51 ?? 8 ???? 51(cr51) ??? tm51 ?? (inttm5n) ? tm51 ? cr51 ??? inttm51 <1> ?? ? ????(pm30) ?1? ? tcl51: ? ti51 ? ti51 ? tcl51 = 00h ti51 tcl51 = 01h ? cr51: ?? ? tmc51: ??? tm51 cr51 ?????? f/f ??? (tmc51 = 00000000b) <2> tce51 = 1 ? ti51 <3> tm51 cr51 ??? inttm51(tm51 (00h)) <4> ?? tm51 ? cr51 ??? , inttm51 ? inttm000 ?? ? ? ? 7-8. ????? ti5n tm5n count value cr5n inttm5n 00h 01h 02h 03h 04h 05h n ? 1 n 00h 01h 02h 03h n count start ? 1. n = 00h ffh 2. n = 1 r01uh0312cj0110 rev.1.10 185 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 7.4.3 8 ???? 51(cr51) ???????? ? 8 ????? 51(tmc51) ? 0 (toe51) ?1? cr51 ?????? to51 ??????(???50) ? uart0 ??? <1> ?? ? ?p30 ????? pm30? ? tcl51 ??? ? cr51 ?? ? tmc51 ??? tm51 cr51 ????? tmc51 = 00000010b <2> tce51 = 1 ??? <3> ? tm51 cr51 ???? f/f ?afinttm51 tm51 ? 00h <4> ????? f/f ?? ? ? = 1/2t (n + 1) (n 00h ffh) ? ?? cr51 ? ? inttm51 ??? ? ? r01uh0312cj0110 rev.1.10 186 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 ? 7-9. ? count clock tm51 count value 00h 01h 02h n ? 1n n 00h n ? 1 n 00h 01h 02h cr51 timer 51 output t count start 7.4.4 pwm 8 ????? 51(tmc51) ? 6 (tmc516) ?1? ?8 ? / ? 51 pwm 8 ???? 51(cr51) ????^ cr51 ? pwm ??? tmc51 ? 1 (tmc511) ?? ????? 51(tcl51) ? 0 2 (tcl510 tcl512) ??? ? pwm ?? cr51 ? 3 ? ( tcl51 ?? ) ? ? pwm uart0 ??? r01uh0312cj0110 rev.1.10 187 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 (1) pwm <1> ?? ? ?(p30) ????? (pm30) ? ? tcl51: ??? ? cr51: ?? ? tmc51: ??? pwm ?? tmc511 ?? 0 ?? 1 ?? (tmc51 = 01000000b 01000010b) <2> tce51 = 1 ?? ? tce51 ??? pwm <1> pwm (to51 ) ?????? <2> ?????? cr51 8 ? 51 ????? <3> cr51 ?????? <4> ? <2> <3> ??? <5> tce51 = 0 ???pwm ?? ????? 7-10 7-11 ?????? ? = 2 8 t ? ? = nt ? ?? = n/2 8 (n = 00h ffh) r01uh0312cj0110 rev.1.10 188 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 ? 7-10. pwm ? (a) ( ? = h) count clock tm5n cr5n tce5n inttm5n to5n 00h 01h ffh 00h 01h 02h n n + 1 ffh 00h 01h 02h m 00h n <2> active level <1> inactive level <3> inactive level <5> inactive level t <2> active level (b) cr5n = 00h count clock tm5n cr5n tce5n inttm5n 01h00h ffh 00h 01h 02h 00h ffh 00h 01h 02h m 00h to5n l (inactive level) t (c) cr5n = ffh tm5n cr5n tce5n inttm5n to5n 01h00h ffh 00h 01h 02h ffh <1> inactive level <2> active level ffh 00h 01h 02h m 00h <3> inactive level <2> active level <5> inactive level t ? 1. ? 8-14 (a) (c) <1> <3> <5> 7.4.4 (1) pwm pwm <1> <3> <5> ? 2. n = 1 r01uh0312cj0110 rev.1.10 189 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 (2) ? cr51 ? ? 7-11. ? cr51 ?? (a) ffh ???? cr51 ? n ?? m ?????? cr51 count clock tm5n cr5n tce5n inttm5n to5n <1> cr5n change (n m) n n + 1 n + 2 ffh 00h 01h m m + 1 m + 2 ffh 00h 01h 02h m m + 1 m + 2 n 02h m h <2> t (b) ffh ???? cr51 ? n ?? m ?????? cr51 count clock tm5n cr5n tce5n inttm5n to5n n n + 1 n + 2 ffh 00h 01h n n + 1 n + 2 ffh 00h 01h 02h n 02h n h m m m + 1 m + 2 <1> cr5n change (n m) <2> t ? ? 8-15<1> <2> ?? cr51 ?????? ( ?? :m,cr51 ?? :n) ? n = 1 r01uh0312cj0110 rev.1.10 190 2013.11.29 pd79f7023, 79f7024 8 ? / ? 51 7.5 8 ? / ? 51 ? (1) ? ????????????? 8 ? 51(tm51) ??? ? 7-12. 8 ? 51(tm51) ?? count clock tm5n count value 00h 01h 02h 03h 04h timer start (2) 8 ? 51(tm51) ?? ?????? tm51 ?????????? ????????? ? 7-13. 8 ? / 51(tm51) ?? 34h 35h 36h 37h 38h 39h 3ah 3bh 34h 35h 37h 38h 3bh count clock tm5n count value read buffer read signal ? n = 1 r01uh0312cj0110 rev.1.10 191 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 8 ? h1 8.1 8 ? h1 8 ? h1 1? ? ? ? ? pwm ? ? 8.2 8 ? h1 8 ? h1 ? 8-1. 8 ? h1 ? ?? 8 ? h1 ? 8 ? h ??? 01(cmp01) 8 ? h ??? 11(cmp11) ? toh1, ?? 8 ? h ??? n(tmhmd1) 8 ? h ??? 1(tmcyc1) ???? 3(pm3) ??? 3(p3) r01uh0312cj0110 rev.1.10 192 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 8-1.8 ? h1 ?? match internal bus tmhe1 cks12 cks11 cks10 tmmd11 tmmd10 tolev1 toen1 8-bit timer h compare register 1 1 (cmp11) decoder toh1/ti51/ intp0/ p30 8-bit timer h carrier control register 1 (tmcyc1) inttmh1 inttm51 selector interrupt generator output controller level inversion pm30 output latch (p30) 1 0 f/f r pwm mode signal carrier generator mode signal timer h enable signal 3 2 8-bit timer h compare register 0 1 (cmp01) 8-bit timer counter h1 clear rmc1 nrzb1 nrz1 reload/ interrupt control 8-bit timer h mode register 1 (tmhmd1) selector toh1 output f prs f prs /2 2 f prs /2 4 f prs /2 6 f prs /2 12 f il f il /2 7 f il /2 9 tm51 r01uh0312cj0110 rev.1.10 193 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 (1) 8 ? h ??? 01(cmp01) 8 ???????? ??? cmp01 ? 8 ? h1 ???????? inttmh1? toh1 ? ???(tmhe1 = 0) ? cr01 ? ????? 00h ? 8-2. 8 ? h ??? 01(cmp01) ?? ? ??? cmp01 ???? cmp01( ?? ) (2) 8 ? h ??? 11(cmp11) 8 ????? pwm ????? pwm ?????? cmp11 ? 8 ? h1 ???????? toh1 ??? ??? cmp11 ??? cmp11 ? 8 ? h1 ?????? ??(inttmh1) ???? ???? cmp11( ??) ??? cmp11 ?????? cmp11 ?????? cmp11, ? ?? cmp ?? cmp11 ?? cmp ?? cmp11 ??? ????? 00h ? 8-3. 8 ? h ??? 11(cmp11) ?? ? pwm ????????? (tmhe1 = 0) ? (tmhe1 = 1) ? cmp11 (cmp11) ? cmp11 ????? r01uh0312cj0110 rev.1.10 194 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 8.3 ? 8 ? h1 4 ? 8 ? h1 ? 8 ? h ??? 1(tmhmd1) ? 8 ?h ??? 1(tmcyc1) ? ???? 3(pm3) ? ??? 3(p3) (1) 8 ? h ??? n(tmhmd1) ??? h ?? 1 8 ???? ????? 00h r01uh0312cj0110 rev.1.10 195 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 8-4. 8 ? h ??? 1(tmhmd1) ?? r01uh0312cj0110 rev.1.10 196 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 1. tmhe1 = 1 ? , tmhmd ?? tmhmd1 ?? 2. pwm ????????? (tmhe1 = 1) ?? ? 8 ? h ??? 11 (cmp11) ? cmp11 ????? 3. ????? tmh1 ???? tm51 ??? 8 ? 4. toh1 ???? toh1/ti51/intp0/p30 ? pm30 p30 ? 1. f prs : ???? 2. f il : ??? (2) 8 ? h ??? 1(tmcyc1) ? 8 ? h1 ???? 1 8 ???? ????? 00h ? 8-5. 8 ? h ??? 1(tmcyc1) ?? ? 0 ? ? tmhe = 1 ?? rmc1 ?? tmcyc1 ?? r01uh0312cj0110 rev.1.10 197 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 (3) ???? 3(pm3) ? 1 ?? 3 p30/toh1/ti51/intp0 ??pm30 p30 ? 1 8 ?? pm3 ????? ffh ? 8-6. ???? 3(pm3) ?? ? ff23h ffh r/w 7 6 5 4 3 2 1 0 pm3 1 1 1 pm34 pm33 pm32 pm31 pm30 pm3n p3n i/o ??? (n = 0 4) 0 ???? 1 ???? r01uh0312cj0110 rev.1.10 198 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 8.4 8 ? h1 8.4.1 ? / 8 ? h1 ???? 01(cmp01) ??? (inttmh1) ?? 8 ? h1 ? 00h ?????2????? 11(cmp11) ?? cmp11 ??? 8 ? h1 cmp11 ??????? ??? h ???(tmhmd1) ? 0 (toen1) ?1? toh1 ????? 50%) ? <1> ?? ? 8-7. ?? / ?? (i) ?? h ??? 1(tmhmd1) 0 0/1 0/1 0/1 0 0 0/1 0/1 tmmd10 tolev1 toen1 cks11 cks12 tmhe1 tmhmd1 cks10 tmmd11 timer output setting default setting of timer output level interval timer mode setting count clock (f cnt ) selection count operation stopped (ii) cmp01 ? n ?????? ? ? = (n +1)/f cnt <2> tmhe1 = 1 ? <3> 8 ? h1 cmp01 ???? inttmh1 ???? 8 ? h1 ? 00h <4> , ??? inttmh1 ???? tmhe1 ? ? 1. ?? 8.3 (3) ???? 3(pm3) 2. inttmh1 ???? ?? r01uh0312cj0110 rev.1.10 199 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 8-8. ? / ? (1/2 (a) (01h cmp01 feh ?? ) 00h count clock count start 8-bit timer counter hn cmp0n tmhen inttmhn tohn 01h n clear interval time clear n 00h 01h n 00h 01h 00h <2> level inversion, match interrupt occurrence, 8-bit timer counter hn clear <2> level inversion, match interrupt occurrence, 8-bit timer counter hn clear <3> <1> <1> ? tmhe1 ?1? , ? 1 ??? <2> 8 ? h1 ? cmp01 ???????? toh1 ? ???? inttmh1 ?? <3> ?? h ? tmhe1 ? inttmh1 ?? toh1 ???? tmhe1 (0) ????????? ? 1. 01h n feh 2. n = 1 r01uh0312cj0110 rev.1.10 200 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 8-8. ? / ? (2/2 (b) cmp01 = ffh ?? 00h count clock count start 8-bit timer counter hn cmp0n tmhen inttmhn tohn 01h feh clear clear ffh 00h feh ffh 00h ffh interval time (c) cmp01 = 00h ?? 00h 00h count clock count start 8-bit timer counter hn cmp0n tmhen inttmhn tohn interval time ? n = 1 r01uh0312cj0110 rev.1.10 201 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 8.4.2 pwm pwm ?????^ 8 ???? 01cmp01 ??? toh1 ????? cmp01 ? 8 ???? 11cmp11 ??? toh1 ?????? cmp11 pwm ???? ??8 ? h1 cmp01 ????pwm (toh1 )?8 ? h1 ? 8 ? h1 cmp11 ??? pwm (toh1 ? <1> ?? ? 8-9. pwm ???? (i) ?? h ??? 1 (tmhmd1) 0 0/1 0/1 0/1 1 0 0/1 1 tmmd10 tolev1 toen1 cks11 cks12 tmhe1 tmhmd1 cks10 tmmd11 timer output enabled default setting of timer output level pwm output mode selection count clock (f cnt ) selection count operation stopped (ii) cmp01 ? ? ??(n) (iii) cmp11 ? ? ??(m) ?? ? 00h cmp11 (m) < cmp01 (n) ffh <2> tmhe1 = 1 ?? <3> ??????? cmp01 ?8 ? h1 cmp01 ?? ??8 ?? h1 ?? (inttmh1) ??? 8 ? h1 ????? cmp01 cmp11 ? <4> 8 ? h1 cmp11 ???? 8 ? h1 ???? cmp11 cmp01 ?? 8 ? h1 ?? inttmh1 ?? r01uh0312cj0110 rev.1.10 202 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 <5> ??? <3> <4> k????^ <6> ?? tmhe1 = 0 cmp01 ??? n cmp11 ??? m??? f cnt pwm ???? ? pwm = (n + 1)/f cnt ? ?? = (m + 1)/(n + 1) ? 1. ???? cmp11 ??? cmp11 ????? ? 3 ? ( ? tmhmd1 cksn2 cksn0 ?? ) 2. ???? (tmhe1 = 0) ? (tmhe1 = 1) ? cmp11 ? ? cmp11 ????? 3. cmp11 ??? (m) cmp01 ??? (n) ? 00h cmp11 (m) < cmp01 (n) ffh ? 1. ?? 8.3 (3) ???? 3(pm3) 2. inttmh1 ?????? ?? r01uh0312cj0110 rev.1.10 203 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 8-10. pwm ???? (1/4) (a) count clock 8-bit timer counter hn cmp0n tmhen inttmhn tohn (tolevn = 0) tohn (tolevn = 1) 00h 01h a5h 00h 01h 02h a5h 00h a5h 00h 01h 02h cmp1n a5h 01h <1> <2> <3> <4> <1> ? tmhe1 ?1? ??? 1 ?? 8 ? h1 ? ?pwm ? <2> 8 ?? h1 cmp01 ?????? 8 ? h1 ? inttmh1 ?? <3> 8 ?? h1 cmp11 ?????? 8 ??? ? inttmh1 ?? <4> ?? h1 ? tmhe1 ?nttmh1 ????pwm ? ? n = 1 r01uh0312cj0110 rev.1.10 204 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 8-10. pwm ???? (2/4) (b) cmp01 = ffh, cmp11 = 00h ?? count clock 8-bit timer counter hn cmp0n tmhen inttmhn tohn (tolevn = 0) 00h 01h ffh 00h 01h 02h ffh 00h ffh 00h 01h 02h cmp1n ffh 00h (c) cmp01 = ffh, cmp11 = feh ?? count clock 8-bit timer counter hn cmp0n tmhen inttmhn tohn (tolevn = 0) 00h 01h feh ffh 00h 01h feh ffh 00h 01h feh ffh 00h cmp1n ffh feh ? n = 1 r01uh0312cj0110 rev.1.10 205 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 8-10. pwm ???? (3/4) (d) cmp01 = 01h, cmp11 = 00h ?? count clock 8-bit timer counter hn cmp0n tmhen inttmhn tohn (tolevn = 0) 01h 00h 01h 00h 01h 00h 00h 01h 00h 01h cmp1n 00h ? n = 1 r01uh0312cj0110 rev.1.10 206 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 8-10. pwm ???? (4/4) (e) ? cmp11 (cmp11 = 02h 03h, cmp01 = a5h) ??? count clock 8-bit timer counter hn cmp01 tmhe1 inttmh1 toh1 (tolev1 = 0) 00h 01h 02h a5h 00h 01h 02h 03h a5h 00h 01h 02h 03h a5h 00h <1> <4> <3> <2> cmp11 <6> <5> 02h a5h 03h 02h (03h) <2>? 80h <1> ? tmhe1 ?1? ??? 1 ?? 8 ? h1 ? ?pwm ? <2> ??, ? cmp11 ?? ??? <3> 8 ? h1 cmp01 ???? 8 ?? h1 ?? nttmh1 ?? <4> ?? cmp11 ????g?? 8 ? h1 cmp11 ?? ????? cmp11 ?? cmp11 ??(<2>?) cmp11 ??????? 3 ?? 3 ??????? ??? <5> 8 ?? h1 ??? cmp11 ?????8 ? h1 ?? inttmh1 ?? <6> ?? h1 ? tmhe1 ?nttmh1 ????pwm ? ? n = 1 r01uh0312cj0110 rev.1.10 207 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 8.4.3 ? ???8 ?? h1 ???????? 8 ?? / ? 51 ????? 8 ??/ ? 51 ?? 8 ? h1 ??? ???? 8 ?/ ? 51 8 ? h1 ? toh1 ? ^ (1) ? ???8 ? h ??? 01 cmp01 ??? 8 ? h ??? 11 cmp11 ??? 8 ? h1 ?? cmp11 ? cmp01 (2) ? 8 ?/ ? 51 ??inttm51 8 ? h ???tmcyc1 nrzb1 rmc1 ????? rmc1 bit nrzb1 bit 0 0 ?? 0 1 inttm51 ???? ? 1 0 ?? 1 1 inttm51 ??? r01uh0312cj0110 rev.1.10 208 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ????tmcyc1 ? nrz1 nrzb1 ???nrz1 ? nrzb1 ? inttm51 ? 8 ? h1 ?? inttm5h1 ?? inttm5h1 ??? nrz1 ??? nrzb1 ?? nrz1 nrzb1 nrz1 ?? ? ? 8-11. ? 8-bit timer h1 count clock tmhe1 inttm51 inttm5h1 nrz1 nrzb1 rmc1 1 1 1 0 00 <1> <2> <3> <1> inttm51 ? 8 ? h1 ?? inttm5h1 ?? <2> inttm5h1 ??? 2 ?? nrzb1 ? nrz1 <3> ? inttm5h1 ????????? nrzb1 ?? cr51 ? ? 1. nrzb1 ???? 2 ???????? nrzb1 ? nrz1 2. 8 ? / ? 51 ???? <1> ?? 8 ?? / ? 51 ????????? ? inttm5h1 ???? r01uh0312cj0110 rev.1.10 209 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 <1> ?? ? 8-12. ????? (i) 8 ? h ??? 1 (tmhmd1) 0 0/1 0/1 0/1 0 timer output enabled default setting of timer output level carrier generator mode selection count clock (f cnt ) selection count operation stopped 1 0/1 1 tmmd10 tolev1 toen1 cks11 cks12 tmhe1 tmhmd1 cks10 tmmd11 (ii) cmp01 ? ? ?? (iii) cmp11 ? ? ?? (iv) tmcyc1 ? ? rmc1 = 1 ... ? ? nrzb1 = 0/1 ... ? (v) tcl51 tmc51 ? ? 7.3 8 ? / ? 51 ?? <2> tmhe1 = 1 ?8 ? h1 ? <3> 8 ????? 51(tmc51) tce51 ?1? ? 8 ?/ ? 51 ? <4> ??????? cmp01 ?8 ? h1 cmp01 ?? ??? inttmh1 ???? 8 ? h1 ??? 8 ? h1 ? ???? cmp01 cmp11 ? <5> 8 ? h1 cmp11 ???? inttmh1 ???? 8 ? h1 (00h) ?? 8 ? h1 ????? cmp11 cmp01 ? <6> ??? <4> <5>k??? <7> inttm51 ? 8 ? h1 ?? inttm5h1 ??inttm5h1 ??? nrzb1 ??? nrzb1 ?? nrz1 <8> ? inttm5h1 ????????? nrzb1 ?? cr51 ? <9> nrz1 ???? toh1 ??? r01uh0312cj0110 rev.1.10 210 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 <10> ??k??????? tmhe1 ? cmp01 ?? n cmp11 ?? m ??f cnt ?? ??? ? ?? = (n + m + 2)/f cnt ? ?? = ??/ ?? = (m + 1)/(n + m + 2) ? 1. ???? (tmhe1 = 0) ? (tmhe1 = 1) ? cmp11 ? cmp11 ????? 2. tmh1 ???? tm51 ??? 6 ? 3. 01h ffh ? cmp01 cmp11 ?? 4. ???? cmp11 ??? cmp11 ???? ??? 3 ? (? tmhmd1 cks12 cks10 ?? ) 5. ??? , ? rmc1 ? 1. ?? 8.3 (3) ???? 3(pm3) 2. inttmh1 ???? ? r01uh0312cj0110 rev.1.10 211 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 8-13. ???? (1/3) (a) cmp01 = n, cmp11 = n ?? cmp01 cmp11 tmhe11 inttmh1 carrier clock 00h n 00h n 00h n 00h n 00h n 00h n n n 8-bit timer 51 count clock tm51 count value cr5 1 tce5 1 toh 1 0 0 1 1 0 0 1 1 0 0 inttm5 1 nrzb 1 nrz 1 carrier clock 00h 01h k 00h 01h l 00h 01h m 00h 01h 00h 01h n inttm5h 1 <1><2> <3> <4> <5> <6> <7> 8-bit timer h1 count clock 8-bit timer counter h1 count value k l m n <1> tmhe1 = 0 tce51 = 0 ??? 8 ? h1 ? <2> tmhe1 = 1 ?8 ? h1 ??????? <3> 8 ? h1 ?? cmp01 ???? inttmh1 ????? ? 8 ? h1 ????? cmp01 cmp11 ?8 ? h1 (00h) <4> 8 ? h1 ?? cmp11 ???? inttmh1 ??????? 8 ? h1 ????? cmp11 cmp01 ? 8 ? h1 (00h) ??? <3> <4> k????50% ???? <5> inttm51 ??? 8 ? h1 ?? inttm5h1 ?? <6> inttm5h1 ??? nrzb1 ??? nrzb1 ?? nrz1 <7> nrz1 = 0 ?toh1 ??? ? inttm5h1 ???? r01uh0312cj0110 rev.1.10 212 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 8-13. ???? (2/3) (b) cmp01 = n, cmp11 = m ?? n cmp01 cmp11 tmhe1 inttmh1 carrier clock tm51 count value 00h n 00h 01h m 00h n 00h 01h m 00h 00hn m tce51 toh1 0 0 1 1 0 0 1 1 0 0 inttm51 nrzb1 nrz1 carrier clock 00h 01h k 00h 01h l 00h 01h m 00h 01h 00h 01h n inttm5h1 <1><2> <3> <4> <5> <6> <7> 8-bit timer 51 count clock 8-bit timer h1 count clock 8-bit timer counter h1 count value k cr51 l m n <1> tmhe1 = 0 tce51 = 0 ??? 8 ? h1 ? <2> tmhe1 = 1 ?8 ? h1 ??????? <3> 8 ? h1 ?? cmp01 ???? inttmh1 ????? ? 8 ? h1 ????? cmp01 cmp11 ?8 ? h1 (00h) <4> 8 ? h1 ?? cmp11 ???? inttmh1 ??????? 8 ? h1 ????? cmp11 cmp01 ? 8 ? h1 (00h) ??? <3> <4> k????50% ???? <5> inttm51 ??? 8 ? h1 ?? inttm5h1 ?? <6> nrz1 ?1???????? <7> nrz1 = 0 ?????????toh1 ????? ( <6> <7> ?? ????? ) ? inttm5h1 ???? r01uh0312cj0110 rev.1.10 213 2013.11.29 pd79f7023, 79f7024 ? 8 ? h1 ? 8-13. ???? (3/3) (c) cmp11 ?? 8-bit timer h1 count clock cmp01 tmhe1 inttmh1 carrier clock 00h 01h n 00h 01h 01h m 00h n 00h l 00h <1> <3>? <4> <3> <2> cmp11 <5> m n l m (l) 8-bit timer counter h1 count value <1> tmhe1 = 1 ?8 ? h1 ??????? <2> 8 ? h1 ? cmp01 ???? inttmh1 ??? toh1 ? ?? (00h) ?? 8 ? h1 ??????? cmp01 cmp11 ? <3> cmp11 ??? 8 ? h1 ??????(l) 8 ? h1 ?? cmp11 ???? m?? <3>? ?? cmp11 ?(<3>?) ? cmp11 ??????? 3 ??? 3 ????? ????? <4> 8 ? h1 ?? cmp11 ??(m)????? inttmh1 ???? ??? (00h) ?? 8 ? h1 ????? cmp11 cmp01 ? <5> ???(l) ? 8 ? h1 ?? cmp11 ?????? r01uh0312cj0110 rev.1.10 214 2013.11.29 pd79f7023, 79f7024 ? ?? ? ?? 9.1 ?? ?????? ?????? ? ? ?? ? ????(wdte)? 1 ? ? ach wdte ? ???? wdte wdte ? ims ???? ? ????? ims ??fb00h ffffh ?cpu ??? ) ??????(resf)1 ? resf ?? ? r01uh0312cj0110 rev.1.10 215 2013.11.29 pd79f7023, 79f7024 ? ?? 9.2 ?? ??? 9-1. ?? ? ?? ??? wdte ??????????? 9-2. ?????? ??? ?? (0080h) ?? 6? 5 ( 1, 0) ??? 4 (wdton) ??? 3 1 (wdcs2 wdcs0) ? ??? ?? ?? ? 9-1. ???? clock input controller reset output controller internal reset signal internal bus selector 17-bit counter watchdog timer enable register (wdte) clear, reset control wdton of option byte (0080h) window1 and window0 of option byte (0080h) count clear signal wdcs2 to wdcs0 of option byte (0080h) overflow signal cpu access signal cpu access error detector window size determination signal f il /2 2 10 /f il to 2 17 /f il r01uh0312cj0110 rev.1.10 216 2013.11.29 pd79f7023, 79f7024 ? ?? 9.3 ???? ????(wdte) ??? (1) ??? wdte ?ach wdte ????? 8 ???? ????? 9ah 1ah ? ? 9-2. ??? wdte ? ? wdte ??????? (0080h) ??? wdton 1 wdton ?? wdte ? 0 ??? 1ah 1 ??? 9ah ? 1. "ach" ? wdte ????????? ?????????? 2. wdte ?? 1 ??????????? ??????????? 3. wdte ???? 9ah/1ah( ? (ach) ? ) r01uh0312cj0110 rev.1.10 217 2013.11.29 pd79f7023, 79f7024 ? ?? 9.4 ?? 9.4.1 ??? 1. ??????? (0080h) ? ? ??? (0080h) ? 4 (wdton)=1 ???? ( ??? )(???) wdton ?? / ??? 0 ? ( ?? ), ??? 1 ( ? ), ?? ? ??? (0080h) ? 3 ? 1 (wdcs2 wdcs0) ?? 9.4.2 ??? ? ??? (0080h) ? 6 ? 5 (window1 window0) ???? 9.4.3 ?? 2. ???? 3. ???????ach? wdte ?????? 4. ??? wdte 2 ????????? wdte ???? 5. ?B???ach wdte ??? ??? ? ????(wdte)? 1 ? ? ach wdte ? ims ????(cpu ?? ? ? cpu ???? ims ??fb00h ffffh ? cpu ?? ?) ? 1. wdte ????????? ?? 2. ? ?ach? wdte ??????????? ?? 2/frl 3. ? (ffffh) ????? 4. ????? halt stop ????? 0 (lsrosc) ??? ?? lsrosc = 0 ( ???? ) lsrosc = 1 ( ???? ) halt ?? stop ?? ???? ?? lsrosc = 0 halt stop ????????? ????? lsrosc = 0 ?? lsrstop( ???? (rcm) ? 1 =1) ??? ????????? 5. ?????????????? ?????????? r01uh0312cj0110 rev.1.10 218 2013.11.29 pd79f7023, 79f7024 ? ?? 9.4.2 ??? ??? (0080h) ? 3 ?1 (wdcs2 wdcs0) ????? ???????????? ach wdte ?? ??????? ?? 9-3. ??? wdcs2 wdcs1 wdcs0 ??? 0 0 0 2 10 /f il (3.88 ms) 0 0 1 2 11 /f il (7.76 ms) 0 1 0 2 12 /f il (15.52 ms) 0 1 1 2 13 /f il (31.03 ms) 1 0 0 2 14 /f il (62.06 ms) 1 0 1 2 16 /f il (124.12 ms) 1 1 0 2 1+ /f il (248.24 ms) 1 1 1 2 17 /f il (496.48 ms) ? 1. ? wdcs2 = wdcs1 = wdcs0 = 0 window1 = window0 = 0 2. ????????????? ??????????? ? 1. f il : ??? 2. ( ): f il = 33 khz (max.) r01uh0312cj0110 rev.1.10 219 2013.11.29 pd79f7023, 79f7024 ? ?? 9.4.3 ????? ??? (0080h) ? 6 ? 6 (window1 window0) ???????? ? ? ???ach wdte ????? ? ??????ach wdte ????? ???? 25% ? window close period (75%) window open period (25%) counting starts overflow time counting starts again when ach is written to wdte. internal reset signal is generated if ach is written to wdte. ? wdte ????????? ?? ??? 9-4. ????? window1 window0 ????? 0 0 25% 0 1 50% 1 0 75% 1 1 100% ? 1. ? wdcs2 = wdcs1 = wdcs0 = 0 window1 = window0 = 0 2. ????????????? ??????????? r01uh0312cj0110 rev.1.10 220 2013.11.29 pd79f7023, 79f7024 ? ?? ? ?? 2 11 /f il ???????? ?? 25% 50% 75% 100% ??? 0 7.11 ms 0 4.74 ms 0 2.37 ms ?? 7.11 7.76 ms 4.74 7.76 ms 2.37 7.76 ms 0 7.76 ms < ?? 25% ?> ? ?: 2 11 /f il (max.)= 2 11 /264 khz (max.)= 7.76 ms ? ???? 0 2 11 /f il (min.) (1 ? 0.25) = 0 2 11 /216 khz (min.) 0.75 = 0 7.11 ms ? ??? 2 11 /f il (min.) (1 ? 0.25) 2 11 /f il (max.)= 2 11 /216 khz (min.) 0.75 2 11 /264 khz (max.) = 7.11 7.76 ms r01uh0312cj0110 rev.1.10 221 2013.11.29 pd79f7023, 79f7024 ? a/d ? ? a/d ? 10.1 a/d ? a/d ?????? 8 ??? 5 ? (ani0 ani4) ?? ani1 ? 0 (amp0out) ????? 0 ?? a/d ?1? ? 8 ?? a/d ? ?? 0 ani0 ani4 ????? 8 ?? a/d ?? a/d ? ??intad r01uh0312cj0110 rev.1.10 222 2013.11.29 pd79f7023, 79f7024 ? a/d ? ? 10-1. a/d ??? intad adcs fr2 fr1 adce fr0 v ss 3 ani0/p20 ani1/amp0out/p21 ani2/p22 ani3/p23 ani4/p24 lv1 lv0 5 ads2 ads1 ads0 av ref adpc0 8 adpc3 adpc2 adpc1 adpc4 adpc5 adpc6 adpc7 selector selector sample & hold circuit a/d voltage comparator adcs bit adce bit successive approximation register (sar) controller a/d conversion result register (adcrh) a/d converter mode register (adm) analog input channel specification register (ads) a/d port configuration register (adpc) internal bus v ss tap selector ? v ss P a/d ????? v ss ? gnd (= 0 v) ? r01uh0312cj0110 rev.1.10 223 2013.11.29 pd79f7023, 79f7024 ? a/d ? 10.2 a/d ? a/d ?? (1) ani0 ani4 5 ? a/d ????????????? i/o ?? (2) amp0out amp0out ?? 0 ? amp0out ? ani1 a/d ?? 0 ???? a/d ? (3) ?? a/d ???????? a/d ??? ?? (4) ? avref avss???????? ? 10-2. ?? adcs series resistor string av ref p-ch v ss (5) ?? ??????????? (6) ?? (sar) ???????? ?(lsb) ??(a/d ?)?sar ??? a/d ??(adcr) (7) 8 a/d ?? h(adcrh) ? a/d ?? a/d ???(sar) adcrh ? ? adcrh ?????? (f prs )????? adcrh ? ? ? r01uh0312cj0110 rev.1.10 224 2013.11.29 pd79f7023, 79f7024 ? a/d ? (8) ?????????/ ???a/d ?? intad (9) av ref a/d ??? / ?? 2 ????? v dd ??? ? av ref v ss ??? ani0 ani4 ???? (10) v ss ????v ss a/d ???? v ss ? gnd (= 0 v)? r01uh0312cj0110 rev.1.10 225 2013.11.29 pd79f7023, 79f7024 ? a/d ? 10.3 a/d ?? a/d ?? 5 ? ? a/d ????(adm) ? 8 a/d ?? h(adcrh) ? ????(ads) ? a/d ?? (adpc) ? ???? 2(pm2) (1) a/d ???? (adm) ?? a/d ??/ ??? 1 8 ?? adm ????? 00h ? 10-3. a/d ???? (adm) ?? ? 1. fr2 fr0 lv1 lv0 a/d ? 10-2 a/d ??? 2 ? adcs adce ??????? 1 s ? adce 1 ? 1 s ?? adcs 1 ???1 s ? adcs 1 ?? ? 10-1. adcs adce adcs adce a/d ? 0 0 ?????? 0 1 ???????? 1 0 ??? ( ??? ? ) 1 1 ????? ? ?? r01uh0312cj0110 rev.1.10 226 2013.11.29 pd79f7023, 79f7024 ? a/d ? ? 10-4. ?????? adce comparator adcs conversion operation conversion operation conversion stopped conversion waiting comparator operation note ? ??? adcs 1 adcs 1 ? 1 s ? ? 1. fr0 fr2 lv1 lv0 ????? a/d ? 2. adm, ????? (f prs )???? adm ?? ? ? r01uh0312cj0110 rev.1.10 227 2013.11.29 pd79f7023, 79f7024 ? a/d ? 10-2. a/d ??? (1) 2.7 v av ref 5.5 v (lv0 = 0) a/d ???? (adm) ??? fr2 fr1 fr0 lv1 lv0 f prs = 2 mhz f prs = 10 mhz ?? (f ad ) 0 0 0 0 0 264/f prs ? 26.4 s f prs /12 0 0 1 0 0 176/f prs 17.6 s f prs /8 0 1 0 0 0 132/f prs 13.2 s f prs /6 0 1 1 0 0 88/f prs 8.8 s ? f prs /4 1 0 0 0 0 66/f prs 33.0 s 6.6 s ? f prs /3 1 0 1 0 0 44/f prs 22.0 s ? f prs /2 ? 4.0 v av ref 5.5 v ? ? 1. ??? 4.0 v av ref 5.5 v ? : f ad = 0.6 v 3.6 mhz 2.7 v av ref < 4.0 v ? : f ad = 0.6 v 1.8 mhz 2 fr2 fr0 lv1 lv0 ????? a/d ? (adcs = 0) 3 ???????????? ? f prs ???? r01uh0312cj0110 rev.1.10 228 2013.11.29 pd79f7023, 79f7024 ? a/d ? ? 10-5. a/d ? a/d ?? adcs wait period note conversion time conversion time sampling sampling timing intad adcs 1 or ads rewrite sampling sar clear sar clear transfer to adcr, intad generation successive conversion ? ??? ?? ? (2) 8 a/d ?? h(adcrh) 8 ? a/d ? ? 8 ?? adcrh ????(00h) ? 10-6. 8 a/d ?? (adcrh) ? ? 1. a/d ???? (adm) ???? (ads) a/d ?? (adpc) ?? adcrh ??????? adm ads adpc ?? ????? 2 ? adcrh ????? (f prs ) ????? adcrh ? ?? ? r01uh0312cj0110 rev.1.10 229 2013.11.29 pd79f7023, 79f7024 ? a/d ? (3) ???? (ads) ???? a/d ?? 1 8 ??? ads ????? 00h ? 10-7. ???? (ads) ? ? ff0eh 00h r/w 7 6 5 4 3 <2> <1> <0> ads 0 0 0 0 0 ads2 ads1 ads0 ads2 ads1 ads0 ?? ? 0 0 0 ani0 p20/ani0 0 0 1 ani1 p21/ani1 ? ?0 ? 0 1 0 ani2 p22/ani2 0 1 1 ani3 p23/ani3 1 0 0 ani4 p24/ani4 ? ? ? 1. ? 3 7 ? 2. ????? 2(pm2) ??? a/d ???? 3 ads ????? (f prs ) ???? ads ?? ? ? (4) a/d ?? (adpc) adpc p20/amp0-/ani0 p24/ani4 i/o ??? i/o ??? 1 ?? adpc ? ??? 2 ?? 1 8 ???? ???adpc ? 00h ? 10-8. a/d ?? (adpc) ? ff97h :00h r/w 7 6 5 4 3 2 1 0 adpc adpc7 adpc6 adpc5 adpc4 adpc3 adpc2 adpc1 adpc0 adpcn i/o ? i/o ? (n = 0 7) 0 ? i/o 1 i/o ? 1. ????? 2(pm12) ?? i/o ??? 2. adpc, ?????????? adpc ?? ? ? r01uh0312cj0110 rev.1.10 230 2013.11.29 pd79f7023, 79f7024 ? a/d ? (5) ???? (pm2) ani0/amp0-/p20 ani4/p24 ??? pm20 pm24 ? 1 ?20 p24 r ?0 ??1 pm20 pm24 ?0 ??? 1 8 ?? pm2 ?????ffh ? 10-9. ???? 2(pm2 ?? ? ff22h ffh r/w 7 6 5 4 3 2 1 0 pm2 pm27 pm26 pm25 pm24 pm23 pm22 pm21 pm20 pm2n p2n i/o ??? (n = 0 7) 0 ???? 1 ???? ? p20/amp0-/ani0 p24/ani4 ?, ????(? 10-3 10-5 ) 10-3. p20/ani0/amp0- p22/ani2/amp0+ adpc ? pm2 ? opamp0e ads ? (n = 0, 2) p20/ani0/amp0- p22/ani2/amp0+ ?anin ?????? 0 ?? anin ??????? ?anin ? ?? 1 ?? anin ? 0 ?? ?? ? ? ? ?anin ? ?? ? ?? anin ?anin ? i/o ? ?? ? ?? anin ? adpc: a/d ?? pm2: ???? 2 opamp0e: ???(ampm)? 7 ads: ???? r01uh0312cj0110 rev.1.10 231 2013.11.29 pd79f7023, 79f7024 ? a/d ? 10-4. p21/ani1/amp0out adpc ? pm2 ? opamp0e ads ? p21/ani1/amp0out ?ani1 ?????? 0 ?? ani1 ??????? ?ani1 ????? ?? 1 ?? ani1 ? 0 ???? ? i/o ? ?? ? ? ?ani1 ? 0 ?? ani1 ?? 1 ? ? ?ani1 ? 0 ?? ani1 i/o ? ?? 1 ? ? 10-5. p23/ani3 p24/ani4 ? adpc ? pm2 ? ads ? (n = 3, 4) p23/ani3 p24/ani4 ?anin ?????? ?? ?? anin ??????? ?? ?? ? ? ?anin ? ?? ?? anin ?anin ? i/o ? ?? ?? anin ? adpc: a/d ?? pm2: ???? 2 opamp0e: ???(ampm)? 7 ads: ???? r01uh0312cj0110 rev.1.10 232 2013.11.29 pd79f7023, 79f7024 ? a/d ? 10.4 a/d ? 10.4.1 a/d ? <1> ?? a/d ????(adm) ? 5 1 (fr2 fr0 lv1 lv0) a/d ???? ? <2> adm ? 0 (adce) 1 ???? <3> ? a/d ?? a/d ?? i/o ?????? 2(pm2) ?? <4> ?????(ads) ? a/d ?? <5> adm ? 7 (adcs) 1 ? ( ?? <6> <13> ?) <6> ?&????? <7> ?????&???? a/d ??????? <8> ??(sar) ? 7 ????????? (1/2)av ref <9> ????????????? (1/2)av ref sar msb 1 ??(1/2)av ref sar msb ? <10> sar ? 6 ?1 ????? 9 ?????? ?? ? 7 = 1 (3/4) av ref ? 7 = 0 (1/4) av ref ?????? sar ? 6 2 ? ?? ??? 6 = 1 ? ?? < ??? 6 = 0 <11> ????? sar ? 0 <12> ? 8 ?? sar ???? a/d ?? (adcrh) ?? a/d ??intad <13> ? <6> <12> k? adcs ? ?? adcs ? adce = 1 ?? a/d ???? <5>?adce = 0 ?? a/d ? ? adce=1 ? 1 s ??? <5>?? a/d ??? <4> ? ? 1. ? <1> <5>??? 1 s 2. <2> ? <4> ???? <2> r01uh0312cj0110 rev.1.10 233 2013.11.29 pd79f7023, 79f7024 ? a/d ? ? 10-10. a/d ?? sampling time sampling a/d conversion undefined conversion result conversion result a/d converter operation conversion time sar intad adcs adcrh ? a/d ?? a/d ????(adm) ? 7 (adcs) (0) a/d ???????(ads) ?? adcs 1 ?? ???a/d ??(adcrh) ? 00h r01uh0312cj0110 rev.1.10 234 2013.11.29 pd79f7023, 79f7024 ? a/d ? 10.4.2 ?? ??(ani0 ani4) ??? a/d ?(8 a/d ?? (adcrh)) ? ??? adcr = int ( 256 + 0.5) v ain av ref (adcr ? 0.5) v ain < (adcr + 0.5) av ref 256 av ref 256 int( ): ( ) ?? v ain : ?? av ref : av ref ?? adcr: 8 a/d ?? (adcrh) ? ?? a/d ????? 10-11 ? ? 10-11. ?? a/d ???? 255 254 253 3 2 1 0 ffh feh fdh 03h 02h 01h 00h a/d conversion result sar adcr 1 512 1 256 3 512 2 256 5 512 input voltage/av ref 3 256 509 512 254 256 510 512 255 256 511 512 1 r01uh0312cj0110 rev.1.10 235 2013.11.29 pd79f7023, 79f7024 ? a/d ? 10.4.3 a/d ??? ?????(ads) ani0 ani4 ?? 1 ?? a/d ? (1) a/d ? ? a/d ????(adm) ? 7 (adcs) 1 ????(ads) ?? ?? a/d ? a/d ?? a/d ? a/d ??(adcrh) ?(intad)? a/d ???? a/d ? ?? ads ???? a/d ??? a/d ?? adcs 0 a/d ????????? ? 10-12. a/d ? anin rewriting adm0 adcs = 1 rewriting ads adcs = 0 anin anin anin anim anin anim anim stopped conversion result immediately before is retained a/d conversion adcrh intad conversion is stopped conversion result immediately before is retained ? 1. n = 0 4 2. m = 0 4 r01uh0312cj0110 rev.1.10 236 2013.11.29 pd79f7023, 79f7024 ? a/d ? <1> ?? a/d ????(adm) ? 5 1 (fr2 fr0 lv1 lv0) a/d ??? ?? <<2> adm ? 0 adce))1 <3> ? a/d ?? (adpc) ????? 2(pm2) ?? <<4> ?????(ads) ?? <<5> adcs ? 7 (adce) 1 ? a/d ? <6> a/d ???????intad <7> a/d ??? a/d ??(adcrh) < ??> <8> ??? 1l(mk1l) ? 0 (admk) 1 ? <9> ? ads ?? a/d ? <10> ?? 1l(if1l) ? 0 (adif)? <11> admk ? <12> a/d ???????intad <13> a/d ??? a/d ??(adcrh) < a/d ?> <14> adcs ? <15> adce ? ? a/d ????? ? 1. ? <1> <5>??? 1 s 2. <2> ? <4> ???? <2> 3. ? <2> <5> ???? 4. <6> <12> ??? adm ? 5 1 (fr2 fr0, lv1, lv0) ???? <9> <12> ? fr2 fr0 lv1 lv0 ???? r01uh0312cj0110 rev.1.10 237 2013.11.29 pd79f7023, 79f7024 ? a/d ? 10.5 a/d ?? ? a/d ??? (1) ? ????1 ??????? 1lsb()1lsb ? ???%fsr ? ?? 8 ? 1lsb = 1/2 8 = 1/256 = 0.391%fsr ????? 2 ?????? ??? ?? (3) ?????? 1/2lsb a/d ? 1/2lsb ??? ??????? ???? ? 10-13. ? 10-14. ideal line digital output overall error analog input av ref 0 0 ...... 0 1 ...... 1 digital output quantization error 1/2lsb 1/2lsb analog input 0 av ref 0 ...... 0 1 ...... 1 (4) 0......000 ?? 0......001 ???????(1/2lsb) ? ??? 0......001 ?? 0......010 ??????? (3/2lsb) ? r01uh0312cj0110 rev.1.10 238 2013.11.29 pd79f7023, 79f7024 ? a/d ? (5) 1......110 ?? 1......111 ??????(? 3/2lsb) ? (6) ?????????? 0 ????? (7) ? ? 1lsb ????? ? 10-15. ? 10-16. 111 011 010 001 zero-scale error ideal line 000 01 2 3 av ref digital output (lower 3 bits) analog input (lsb) 111 110 101 000 0 av ref ?3 full-scale error ideal line analog input (lsb) digital output (lower 3 bits) av ref ? 2av ref ?1 av ref ? 10-17. ? ? 10-18. ? 0 av ref digital output analog input integral linearity error ideal line 1 ...... 1 0 ...... 0 0 av ref digital output analog input differential linearity error ideal 1lsb width 1 ...... 1 0 ...... 0 (8) ?? ?????? ???? (9) ? ??????????????? sampling time conversion time r01uh0312cj0110 rev.1.10 239 2013.11.29 pd79f7023, 79f7024 ? a/d ? 10.6 ? a/d ?? (1) stop ??? ? stop ???? dc ?? stop ??? a/d ????(adm) ? 7 (adcs) ? 0 ?1 ????? 1l(if1l) ? 0 (adif) ?? (2) ani0 ani4 ? ???? ani0 ani4 ? av ref v ss ??(????) ?????????? (3) ? <1> ?a/d ??(adcrh) ?? adcrh ????? ?? adcrh ??? adcrh <2> ?adcrh a/d ????(adm) ?????(ads) a/d ? ?(adpc) ??? adm ads adpc ? adcrh ???? (intad) (4) ? ?? 8 ???? av ref ? ani0 ani4 ? <1> ??????? <2> ????????? 10-19 ?? c <3> ???? <4> ?? halt ????? r01uh0312cj0110 rev.1.10 240 2013.11.29 pd79f7023, 79f7024 ? a/d ? ? 10-19. ?? reference voltage input c = 100 to 1,000 pf if there is a possibility that noise equal to or higher than av ref or equal to or lower than v ss may enter, clamp with a diode with a small v f value (0.3 v or lower). av ref ani0 to ani4 v ss (5) ani0/p20 ani4/p24 <1> ?(ani0 ani4) ? i/o ? (p20 p24) ? ani0 ani4 ??? a/d ????? p20 p27 ?????? <2> ani0/p20 ani4/p24 i/o ?? av ref (ani4/p24 ) ???? v ss (ani0/p20 ) ?? <3> a/d ?????? a/d ??? ?? a/d ????^ (6) ani0 ani4 ??a/d ???? ?????????????? ? ????? 10k 100pf ??? ani0 ani4 (? 10-19) (7) av ref ? av ref v ss ??? k ?? ????? avref avss ???????? r01uh0312cj0110 rev.1.10 241 2013.11.29 pd79f7023, 79f7024 ? a/d ? (8) ? adif ??????(ads) ?adif?? ? a/d ???? ads ???? a/d ? adif ??? ads ? adif? a/d ?? adif ? ? a/d ???????? adif ? ? 10-20. a/d ??? ads rewrite (start of anin conversion) a/d conversion adcrh adif anin anin anim anim anin anin anim anim ads rewrite (start of anim conversion) adif is set but anim conversion has not ended. ? 1. n = 0 4 2. m = 0 4 (9) a/d ???? adce 1 1 s ? adcs 1 adce=0 ? adcs 1 a/d ?? a/d ? ??????? a/d ?(intad)? 1 ??? (10) a/d ?? (adcrh) ?? a/d ???? (adm) ???? (ads) a/d ?? (adpc) ? adcrh ??????? adm ads adpc ??? ???? r01uh0312cj0110 rev.1.10 242 2013.11.29 pd79f7023, 79f7024 ? a/d ? <11> ??? ? ? 10-21. anin ?? anin c1 c2 r1 10-6. ??? av ref r1 c1 c2 2.7 v Qav ref Q 5.5 v 11.5 k ? 8.0 pf 8.0 pf r01uh0312cj0110 rev.1.10 243 2013.11.29 pd79f7023, 79f7024 ?? ? ?? ? 11.1 ? pd79f7023 79f7024 ? 0 1 2 (ampn- ? ampn+ ) 1 (ampnout ) ????? amp0out ?? a/d ????? a/d ??? ? n = 01 r01uh0312cj0110 rev.1.10 244 2013.11.29 pd79f7023, 79f7024 ?? ? 11.2 ? ?? 11-1. ? ? ? ampn ? , ampn+ ? ampnout ?? ??? (ampm) a/d ? (adpc) ???? (ads) ???? 2(pm2) ? n = 01 ? 11-1. ??? internal bus _ + opam p0e opam p1e operational amplifier control register (ampm) amp1+/p27 amp1-/p25 amp1out/p26 amp1 _ + amp0+/ani2/p22 amp0-/ani0/p20 amp0out/ani1/p21 amp0 operational amplifier 1 operational amplifier 0 to a/d converter (analog input channel: ani1) r01uh0312cj0110 rev.1.10 245 2013.11.29 pd79f7023, 79f7024 ?? ? 11.3 ????? ?? 4 ? ? ???(ampm) ? a/d ?? (adpc) ? ????(ads) ? ???? 2(pm2) (1) ??? (ampm) ? 0 1 ? 1 8 ?? ampm ????? 00h ? 11-2. ??? (ampm)?? ? ff60h 00h r/w <7> 6 5 4 <3> 2 1 0 ampm opamp0e 0 0 0 opamp1e 0 0 0 opamp0e ? 0 0 ??? 0 1 ? 0 ? ?? 0 ?? 0 ?? 2 ??? a/d ? ??????? opamp1e ? 1 0 ??? 1 1 ? 1 r01uh0312cj0110 rev.1.10 246 2013.11.29 pd79f7023, 79f7024 ?? ? (2) a/d ?? (adpc) adpc p20/amp0-/ani0 p24/amp4 ? i/o ??? i/o ??? 1 ?? adpc ???? 2 ?? ???adpc ? 00h ? 11-3. a/d ?? (adpc) ? ff97h :00h r/w 7 6 5 4 3 2 1 0 adpc adpc7 adpc6 adpc5 adpc4 adpc3 adpc2 adpc1 adpc0 adpcn i/o ? i/o ? (n = 0 7) 0 ? i/o 1 i/o ? 1. ????? 2(pm2) ?? i/o ???? 2. adpc, ?????????? adpc ?? ? ?? r01uh0312cj0110 rev.1.10 247 2013.11.29 pd79f7023, 79f7024 ?? ? (3) ???? (ads) ???? a/d ?? 1 8 ?? ads ????? 00h ? 11-4. ???? (ads) ?? ? ff0eh 00h r/w 7 6 5 4 3 <2> <1> <0> ads 0 0 0 0 0 ads2 ads1 ads0 ads2 ads1 ads0 ?? ? 0 0 0 ani0 p20/ani0 0 0 1 ani1 p21/ani1 ? ?0 ? 0 1 0 ani2 p22/ani2 0 1 1 ani3 p23/ani3 1 0 0 ani4 p24/ani4 ? ? ? 1. ? 3 7 ? 2. ????? 2(pm2) ??? a/d ???? (4) ???? 2(pm2) ? 0 ?amp0-/ani0/p20amp0out/ani1/p21 amp0+/ani2/p22 ? pm20 pm22 ? 1 ? 1 ?amp1-/p25 amp1out/p26 amp1+/p27 ? pm25 pm27 ?1 ?p20 p22 p25 p27 r? 0 ??1 pm20 pm22 pm25 pm27 ? 0 ?? 0 1 ? 1 8 ?? pm2 ????? ffh ? 11-5. ???? 2(pm2) ?? ? ff22h ffh r/w 7 6 5 4 3 2 1 0 pm2 pm27 pm26 pm25 pm24 pm23 pm22 pm21 pm20 pm2n p2n i/o ??? (n = 0 7) 0 ???? 1 ???? r01uh0312cj0110 rev.1.10 248 2013.11.29 pd79f7023, 79f7024 ?? ? ? p20/ani0/amp0-, p21/ani1/amp0out p22/ani2/amp0+ ?, ???? (? 11-2 11-3 ) 11-2. p20/ani0/amp0- p22/ani2/amp0+ adpc ? pm2 ? opamp0e ads ? (n = 0, 2) p20/ani0/amp0- p22/ani2/amp0+ ?anin ?????? 0 ?? anin ??????? ?anin ? ?? 1 ?? anin ? ?? ?? ? ? ? ?anin ? ?? ? ?? anin ?anin ? i/o ? ?? ? ?? anin 11-3. p21/ani1/amp0out adpc ? pm2 ? opamp0e ads ? p21/ani1/amp0out ?ani1 ?????? 0 ?? ani1 ??????? ?ani1 ????? ?? 1 ?? ani1 ? 0 ???? ? i/o ? ?? ? ? ? ?ani1 ? 0 ?? ani1 ?? 1 ? ? ?ani1 ? 0 ?? ani1. i/o ? ?? 1 ? ? ? adpc: a/d ?? pm2: ???? 2 opamp0e: ???(ampm)? 7 ads: ???? r01uh0312cj0110 rev.1.10 249 2013.11.29 pd79f7023, 79f7024 ?? ? 11.4 ? 2 ampn- ? ampn+ ) 1 (ampnout )????? amp0out ?P a/d ????? a/d ??? ? <1> ? adpc ???(ampn ? , ampn+, ampnout) ? i/o <2> ? pm2 ??? (ampn ? , ampn+, ampnout) ??? <3> opampne ?1 ? ? a/d ??? ads ?????? ? n = 01 r01uh0312cj0110 rev.1.10 250 2013.11.29 pd79f7023, 79f7024 ? ? ? ? 12.1 ? ?1? ? ?2? <1> ?? <2> ? (cmpcom)? ? ??????? egp2 egn2 ?( ? ? ) ? ??? ? 12-1. ??? + _ selector cmpin/p32/rxd0 cmpcom/p31/txd0 0 1 noise filter internal comparison voltage cflg cinv creg sel couten cmp0en cdfs1 cdfs0 cmp outen comparator 0 control register (cmpctl) external interrupt rising edge enable registers (egp) cmpout/p34/ to00/ti010 controller comparator port configuration register (cmppc) cmpcom pc cmpin pc egn2 egp2 edge detection circuit intcmp external interrupt falling edge enable registers (egn) 12.2 ? ?? 12-1. ? ? ?? ??? (cmpctl) ??? (cmppc) ???? 3(pm3) ??? 3 (p3) r01uh0312cj0110 rev.1.10 251 2013.11.29 pd79f7023, 79f7024 ? ? 12.3 ??? ? 3 ? ? ???(cmpctl) ? ???(cmppc) ? ???? 3pm3) (1) ??? (cmpctl) cmpctl ???? / ?????? 1 8 ?? cmpctl ???cmpctl ? 00h ? 12-2. ??? (cmpctl) ?? (1/2) ? ff61h 00h r/w <7> <6> <5> <4> <3> 2 <1> <0> cmpctl cmp0en cdfs1 cdfs0 cmpouten cregsel cflg couten cinv cmp0en ?0 0 ?? 1 ? 0 ?? cdfs1 cdfs0 0 0 ? 0 1 2/f prs 1 0 2 2 /f prs 1 1 2 3 /f prs cmpouten ?? 0 ??? 1 ?? cregsel ?? 0 ?? cmpcom 1 ?? ( ?? : ? ? ) cflg ?? 0 ??? ?0? 1 ??? ?1? coe ?? 0 ? ( ? = ??? 1 r01uh0312cj0110 rev.1.10 252 2013.11.29 pd79f7023, 79f7024 ? ? ? 12-2. ??? (cmpctl) ?? (2/2) cinv 0 1 ? 1. ?????? (cmp0en = 0) , cdfs1 cdfs0 cmpouten cregsel couten cinv 2. ???????? (f prs ) ??? 3. ??? ? ? + 1 ? ? ?? ? f prs : ??? (2) ??? (cmppc) cmppc ? i/o ?? 1 8 ?? cmppc ???cmppc ? 00h ? 12-3. ??? (cmppc) ? ? ff62h 00h r/w 7 6 5 4 3 2 <1> <0> cmppc 0 0 0 0 0 0 cmpcom pc cmpinpc cmpcom pc p31/txd0/cmpcom ? (a) (d) ? 0 ? (a)( ?? 1 (d) cmpinpc p32/rxd0/cmpin ? (a) (d) ? 0 ? (a)( ?? 1 (d) r01uh0312cj0110 rev.1.10 253 2013.11.29 pd79f7023, 79f7024 ? ? (3) ???? 3(pm3) pm3 1 ??? 3 cmpin/p32/rxd0 ? cmpcom/p31/txd0 ??????? pm31 pm32 ??1? ?p31 p32 r? ?0? ???1? 1 8 ?? pm3 ???pm3 ? ffh ? 12-4. ???? 3(pm3) ?? ? ff23h ffh r/w 7 6 5 4 3 2 1 0 pm3 1 1 1 pm34 pm33 pm32 pm31 pm30 ? ? pm3 ? 5 7 ? 1 pm3n p3n i/o ??? (n = 0 4) 0 ???? 1 ???? ? ?????? cmpcom ????????? ????? 3(p3) r01uh0312cj0110 rev.1.10 254 2013.11.29 pd79f7023, 79f7024 ? ? ? p32/rxd0/cmpin p31/txd0/cmpcom ?, ????(? 12-2 12-3 ) 12-2. p32/rxd0/cmpin cmppc ? pm3 ? cmp0en p32/rxd0/cmpin 0 ?? 1 ? 0 i/o ? ?? 1 ? 0 ??? ?? 1 ??? ?? ?? ? ? ? cmppc: ??? pm3: ???? 3 cmp0en: ??? 7 (cmpctl) ads: ???? 12-3.p31/txd0/cmpcom cmppc ? pm3 ? cmp0en cregsel p31/txd0/cmpcom 0 0 1 0 ? ?? 1 1 / ??? 0 0 1 0 ? i/o ? ?? 1 1 / ??? 0 0 1 ??? 0 ??? ?? 1 1 ??? ?? ?? ? ? ? cmppc: ??? pm3: ???? 3 cmp0en ??? 7 (cmpctl) ads: ???? r01uh0312cj0110 rev.1.10 255 2013.11.29 pd79f7023, 79f7024 ? ? 12.4 ? 12.4.1 ? ( ???? ) ? 12-5. ?? ( ??? ) cmp0en bit setting cmpctl register setting operation start enable the comparator operation by setting (1) the cmp0en bit of cmpctl. input to the cmpin pin will be enabled at the same time. pm3 register setting setting the pin to be used as a comparator input to input mode. setting the pin to be used as a comparator input to analog input. cmppc register setting use the cinv bit of cmpctl to select forwarding or reversing of the output. setting to the internal reference voltage by using the cregsel bit. use the cdfs0 and cdfs1 bits to select the noise elimination width. (output disabled state) setting (1) the couten bit of cmpctl and enabling the comparator output. couten bit setting note start ? cregsel ?? 20 s r01uh0312cj0110 rev.1.10 256 2013.11.29 pd79f7023, 79f7024 ? ? 12.4.2 ? ( ?? cmpcom ? ) ? 12-6. ?? ( ???? (cmpcom) ? start setting the pin to be used as a comparator input and comparator common input to analog input. couten bit setting note operation start pm3 register setting setting the pin to be used as a comparator and comparator common input to input mode. cmppc register setting cmpctl register setting use the cinv bit of cmpctl to select forwarding or reversing of the output. setting the external reference voltage by using the cregsel bit. use the cdfs0 and cdfs1 bits to select the noise elimination width. (output disabled state) setting (1) the couten bit of cmpctl and enabling the comparator output. cmp0en bit setting enable the comparator operation by setting (1) the cmp0en bit of cmpctl. input to the cmpin pin will be enabled at the same time. ? cmpen ?? 1 s coe ?1? 12.4.3 ??? ? 12-7. ???? operation in progress operation stop cmp0en bit setting clear (0) the cmp0en bit of cmpctl. couten bit setting clear (0) the couten bit of cmpctl. r01uh0312cj0110 rev.1.10 257 2013.11.29 pd79f7023, 79f7024 ? ? uart0 ? ? uart0 13.1 ? uart0 ? uart0 ?? (1) ???? ?????????? 13.4.1 ???? (2) ?? (uart) ?? ?? 13.4.2 ?? (uart) ?? 13.4.3 ?? ? ? 625 kbps ? 2 t x d0: r x d0: ? ? 7 8 ???? ? ??? 5 ??? ? ??? ( ??) ? ?? lsb ?? ? 1. ? uart0 ?????? ( ,halt ?? ), ? . ? uart0 ? ???? ( ,stop ?? ), ???????? t x d0 ?? ?????g ????? ? power0 = 0 rxe0 = 0 txe0 = 0 2. ? power0 = 1 txe0 = 1 ( ) rxe0 = 1 ( ) ????? 3. ? brgc0 (f xclk0 ) ? txe0 rxe0 ? ?????? txe0 rxe0 ?? 2 ??? txe0 rxe0 ?1? 2 ? txe0 rxe0 txe0 rxe0 ?? 4. txe0 = 1 ??? 1 ? (f xclk0 ) ??? txs0 r01uh0312cj0110 rev.1.10 258 2013.11.29 pd79f7023, 79f7024 ? ? uart0 13.2 ? uart0 ? uart0 ? 13-1. ? uart0 ? ? ?? 0(rxb0) ? 0(rxs0) ? 0(txs0) ?? ?????? 0(asim0) ??????? 0(asis0) ?? 0(brgc0) ???? 3(pm3) ??? 3(p3) r01uh0312cj0110 rev.1.10 259 2013.11.29 pd79f7023, 79f7024 ? ? uart0 ? 13-1. ? uart0 ?? intst0 intsr0 transmit shift register 0 (txs0) receive shift register 0 (rxs0) receive buffer register 0 (rxb0) asynchronous serial interface reception error status register 0 (asis0) asynchronous serial interface operation mode register 0 (asim0) baud rate generator control register 0 (brgc0) 8-bit timer/ event counter 51 output registers selector baud rate generator baud rate generator reception unit reception control filter internal bus transmission control transmission unit output latch (p31) pm31 7 7 t x d0/ cmpcom/ p31 r x d0/ cmpin/p32 f prs /2 5 f prs /2 3 f prs /2 f xclk0 r01uh0312cj0110 rev.1.10 260 2013.11.29 pd79f7023, 79f7024 ? ? uart0 (1) ?? 0(rxb0) 8 ???? 0(rxs0) ??? ?? 1 ???????? 0(rxs0) ?? ??1? ????? rxb0 ? 0 6 rxb0 msb ??0? (ove0)??? rxb0 ? 8 ??? rxb0 ??? ?? power0 = 0 ??? ffh (2) ? 0(rxs0) ?? r x d0 ????? ??? rxs0 (3) ? 0(txs0) ???? txs0 t x d0 ???? 8 ? ? txs0 ??? ?? power0 = 0 txe0 = 0 ??? ffh ? 1. txe0 = 1 ??? 1 ? (f xclk0 ) ??? txs0 2. ? (intst0) ????? r01uh0312cj0110 rev.1.10 261 2013.11.29 pd79f7023, 79f7024 ? ? uart0 13.3 ??? uart0 ? 5 ??? uart0 ? ?????? 0(asim0) ? ??????? 0 (asis0) ? ??? 0(brgc0) ? ???? 3(pm3) ? ??? 3 (p3) (1) ?????? 0(asim0) 8 ???? uart0 ??? 1 8 ???? ????? 01h ? 13-2. ?????? 0(asim0)? (1/2) ? ff50h 01h r/w <7> <6> <5> 4 3 2 1 0 asim0 power0 txe0 rxe0 ps01 ps00 cl0 sl0 1 power0 / ??? 0 ? 1 ???????????? ? 2 1 ?? txe0 / ? 0 ???? 1 ? rxe0 / ? 0 ???? 1 ? ? 1. power0 = 0 ? r x d0 ???? 2. ??????? 0(asis0) ? 0(txs0) ??? 0(rxb0) r01uh0312cj0110 rev.1.10 262 2013.11.29 pd79f7023, 79f7024 ? ? uart0 ? 13-2. ?????? 0(asim0)? (2/2) ps01 ps00 ? ? 0 0 ?? ?? 0 1 0 ? ?? ? 1 0 ? 1 1 ? ?? cl0 ?/ ?? 0 ?? = 7 1 ?? = 8 sl0 ???? 0 ?? = 1 1 ?? = 2 ? ? ? 0 ? ? ??????????? 0(asis0) ? 2 (pe0) ?? ? 1. ?? , power0 ? ?1? txe0 ? ?1? ??? , txe0 ? ?0? power0 ? ?0? 2. ?? , power0 ? ?1? rxe0 ? ?1? ??? , rxe0 ? ?0? power0 ? ?0? 3. ?? rxd0 ?? power0 ? ?1? rxe0 ? ?1? ??? power0 rxe0 ?? ?1? ??? 4. ? brgc0 (f xclk0 ) ? txe0 rxe0 ??????? txe0 rxe0 ?? 2 ??? txe0 rxe0 ?1? 2 ? txe0 rxe0 txe0 rxe0 ?? 5. txe0 = 1 ??? 1 ? (f xclk0 ) ?? txs0 6. ps01 ps00 cl0 ?? txe0 rxe0 ? 7. sl0 ??? txe0 = 0 ?? " ??? = 1? ????? sl0 ???? 8. ? 0 ?1? r01uh0312cj0110 rev.1.10 263 2013.11.29 pd79f7023, 79f7024 ? ? uart0 (2) ??????? 0(asis0) ??? uart0 ????? 3 ?? (pe0, fe0, ove0) 8 ???? ???asim0 ? 7 (power0) ? 5 (rxe0) ????????? ???00h? ?? asis0 ????? 0(rxb0) ? ? 13-3. ??????? 0(asis0) ?? ? ff53h 00h r 7 6 5 4 3 2 1 0 asis0 0 0 0 0 0 pe0 fe0 ove0 pe0 ????? 0 power0 = 0 rxe0 = 0 ?; asis0 ??? 1 ? , ???? fe0 ????? 0 power0 = 0 rxe0 = 0 ?; asis0 ??? 1 ???? ove0 ???? 0 power0 = 0 rxe0 = 0 ?; asis0 ??? 1 ? rxb0 ???????? ? 1. pe0 ??????? (asim0) ps01 ps00 ???? 2. ????????? 1 3. ???? 0(rxb0 ? 4. adpc ? , ????? (f prs ) ???? asis0 ?? ??? ? r01uh0312cj0110 rev.1.10 264 2013.11.29 pd79f7023, 79f7024 ? ? uart0 (3) ??? 0(brgc0) ??? uart0 ??? 5 ??? ? 8 ?? brgc0 ????? 1fh ? 13-4. ??? 0(brgc0) ?? ? ff51h 1fh r/w 7 6 5 4 3 2 1 0 brgc0 tps01 tps00 0 mdl04 mdl03 mdl02 mdl01 mdl00 ?? (f xclk0 ) ? tps01 tps00 f prs = 2 mhz f prs = 5 mhz f prs = 10 mhz 0 0 tm51 ? 0 1 f prs /2 1 mhz 2.5 mhz 5 mhz 1 0 f prs /2 3 250 khz 625 khz 1.25 mhz 1 1 f prs /2 5 62.5 khz 156.25 khz 312.5 khz mdl04 mdl03 mdl02 mdl01 mdl00 k ? 5 ? 0 0 ? 0 1 0 0 0 8 f xclk0 /8 0 1 0 0 1 9 f xclk0 /9 0 1 0 1 0 10 f xclk0 /10 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 1 1 0 1 0 26 f xclk0 /26 1 1 0 1 1 27 f xclk0 /27 1 1 1 0 0 28 f xclk0 /28 1 1 1 0 1 29 f xclk0 /29 1 1 1 1 0 30 f xclk0 /30 1 1 1 1 1 31 f xclk0 /31 ? ? tm51 ?????? ? tm51 cr51 ??????? (tmc516 = 0) 8 ? / ? 51 ?? f/f ? (tmc511 = 1) ? pwm ?? (tmc516 = 1) 8 ? / ? 51 ????? = 50% ? 1. mdl04 mdl00 ?? asim0 ? 6 (txe0) ? 5 (rxe0) = 0 2. tps01 tps00 ?? asim0 ? 7 (power0) = 0 3. ? 5 ?? 1/2 ? 1. f xclk0 : ? tps01 tps00 ??? 2. f prs : ???? 3. k: mdl04 mdl00 ?? (k = 8, 9, 10, ..., 31) 4. : r01uh0312cj0110 rev.1.10 265 2013.11.29 pd79f7023, 79f7024 ? ? uart0 5. tmc516 8 ????? 51(tmc51) ? 6 tmc511 tmc51 ? 1 (4) ???? 3(pm3) ? 1 ?? 3 p31/txd0/cmpcom ???pm31 ? p31 ?1? p32/rxd0/cmpin ??? pm32 ?1? ? p32 r? ?0? ???1? 1 8 ?? pm3 ????? ffh ? 13-5. ???? 3(pm3) ?? ? ff23h ffh r/w 7 6 5 4 3 2 1 0 pm3 1 1 1 pm34 pm33 pm32 pm31 pm30 pm3n p3n i/o ??? (n = 0 4) 0 ???? 1 ???? r01uh0312cj0110 rev.1.10 266 2013.11.29 pd79f7023, 79f7024 ? ? uart0 13.4 ? uart0 ? uart0 ?? ? ???? ? ??(uart) ?? 13.4.1 ???? ??????????????????? asim0 ? 7 6 ? 5 (power0 txe0 rxe0) ? (1) ?? ??????? 0(asim0) ???? 1 8 ?? asim0 ????? 01h ? ff50h 01h r/w <7> <6> <5> 4 3 2 1 0 asim0 power0 txe0 rxe0 ps01 ps00 cl0 sl0 1 power0 / ??? 0 ? 1 ???????????? ? 2 txe0 / ? 0 ???? rxe0 / ? 0 ???? ? 1. power0 = 0 ? r x d0 ???? 2. ??????? 0(asis0) ? 0(txs0) ??? 0(rxb0) ? ????? txe0 rxe0cl ?? power0 ? ??? , power0 ? ?1? txe0 ? ?1? ? rxd0/cmpin/p32 txd0/cmpcom/p31 ????? ?? r01uh0312cj0110 rev.1.10 267 2013.11.29 pd79f7023, 79f7024 ? ? uart0 13.4.2 ?? (uart) ?? ?? 1 ? / ????? uart ???????? (1) ???? ? ?????? 0(asim0) ? ??????? 0 (asis0) ? ??? 0(brgc0) ? ???? 3(pm3) ? ??? 3 (p3) uart ????? <1> brgc0 ? ( ? 13-4 ) <2> asim0 ?? 1 4 (sl0, cl0, ps00 ps01)( ? 13-2 ) <3> asim0 ? 7 (power0) ?1? <4> asim0 ? 6 (txe0) ?1? ?? asim0 ? 5 (rxe0) 1 ? <5> txs0 ? ??? ? ??????????????? ????? 13-2. ???? ? power0 txe0 rxe0 pm31 p31 pm32 p32 uart0 txd0/cmpcom/p31 rxd0/cmpin/p32 0 0 0 ? ? ? ? ?? cmpcom/p31 cmpin/p32 0 1 ? ? 1 cmpcom/p31 rxd0 1 0 0 1 ? ? txd0 cmpin/p32 1 1 1 0 1 1 / txd0 rxd0 ? ????? ? power0: ?????? 0(asim0) 7 txe0: asim0 6 rxe0: asim0 5 pm3 : ???? p3 : ? r01uh0312cj0110 rev.1.10 268 2013.11.29 pd79f7023, 79f7024 ? ? uart0 (2) ?? (a) / ????? / ?????? 13-6 13-7 ? ? 13-6. uart / ??? start bit parity bit d0 d1 d2 d3 d4 1 data frame character bits d5 d6 d7 stop bit ??? ? ? ...1 ? ? ...7 8 (lsb first) ? ? ... ?/ / / ? ?? ...1 2 ?????? 0(asim0) ????????? ? 13-7. uart / ?? 1. ?? 8 ???? 1 ?? 55h 1 data frame start d0 d1 d2 d3 d4 d5 d6 d7 parity stop 2. ?? 7 ???? 2 ?? 36h 1 data frame start d0 d1 d2 d3 d4 d5 d6 parity stop stop 3. ?? 8 ???? 1 ?? 87h 1 data frame start d0 d1 d2 d3 d4 d5 d6 d7 stop r01uh0312cj0110 rev.1.10 269 2013.11.29 pd79f7023, 79f7024 ? ? uart0 (b) ??? ???????????? ? 1 ??? (i) ? ? ?????????1? ??? ??? ?1? 1 ??1? 0 ? ???1? ? (ii) ? ????????????1? ?? ?1? 0 ??1? 1 ? ???1? ?? (iii) 0 ? ????? ????0? ?1? ? (iv) ? ?? ?????? r01uh0312cj0110 rev.1.10 270 2013.11.29 pd79f7023, 79f7024 ? ? uart0 (c) ?????? 0(asim0) ? 7 (power0)=1 ? 6 (txe0)?1? ??? ?? 0(txs0) ???????? ???? t x d0 ?? lsb ?????? asim0 ???(intst0) ?? txs0 ??? (intst0) ?? 13-8 ?????? ? txs0 ?? (intst0) ????? ? 13-8. ? 1. ??? 1 intst0 d0 start d1 d2 d6 d7 stop t x d0 (output) parity 2. ??? 2 t x d0 (output) intst0 d0 start d1 d2 d6 d7 parity stop r01uh0312cj0110 rev.1.10 271 2013.11.29 pd79f7023, 79f7024 ? ? uart0 (d) ?????? 0(asim0) ? 7 (power0) ?1? ? asim0 ? 5 (rxe0) 1 ? ? r x d0 r x d0 ??? 5 ???? 0brgc0 ??? rxd0 ?(? 14-9 ) ? rxd0 ????? ????????? 0(rxs0) ???? ?(intsr0) ? rxs0 ?? 0(rxb0) (ove0)?? rxb0 ????(pe0) ?????????? (intsr0) ????? intsr0 ? 13-9. ? r x d0 (input) intsr0 start d0 d1 d2 d3 d4 d5 d6 d7 parity stop rxb0 ? 1. ?????????? 0(asis0) ????? 0(rxb0) ? ??????????? 2. ?? ? ??? = 1? ?????? r01uh0312cj0110 rev.1.10 272 2013.11.29 pd79f7023, 79f7024 ? ? uart0 (e) ? ???????????? 0(asis0) ????????? (intsr0) ???(intsr0) ? asis0 ????? (? 13-3) ?? asis0 ?? 13-3. ?? ? ? ? ???? ? ??? ???? (rxb0) ???? (f) ? ????? r x d0 ?? ????? ? 12-10 ???????? 2 ?? ? 13-10. ? internal signal b internal signal a match detector in base clock r x d0/cmpin/p32 q in ld_en q r01uh0312cj0110 rev.1.10 273 2013.11.29 pd79f7023, 79f7024 ? ? uart0 13.4.3 ?? ?? 1 ??? 1 ? 5 ??? uartcn / ??? ??????? 5 (1) ? ? ?? ?????? 0(asim0) ? 7 (power0) ?1? ????? 0(brgc0) 7 ? 6 (tps01 tps00) ????????? , ? f xclk0 ? power0 = 0 ?????? ? ? ?????? 0(asim0) ? 7 (power0) 6 (txe0) = 0 ??? ? power0 = 1 txe0 = 1 ?? 1 ?? 0(txs0) ?? ? ? ?????? 0(asim0) ? 7 (power0) 5 (txe0) ?0? ??? ? ??? ? 1 ????????? ? 13-11. ? f xclk0 selector power0 5-bit counter match detector baud rate brgc0: mdl04 to mdl00 1/2 power0, txe0 (or rxe0) brgc0: tps01, tps00 8-bit timer/ event counter 51 output f prs /2 5 f prs /2 f prs /2 3 baud rate generator ? power0: ?????? 0(asim0) 7 txe0: asim0 6 rxe0: asim0 5 brgc0: ??? 0 r01uh0312cj0110 rev.1.10 274 2013.11.29 pd79f7023, 79f7024 ? ? uart0 (2) ?? ???? 0(brgc0) ???? brgc0 ? 7 ? 6 ((tps01 tps00) ? 5 ?? brgc0 ? 4 0 (mdl04 mdl00) ? 5 ??? (f xclk0 /8 f xclk0 /31) 13.4.4 ? (1) ??? ???? ? = [bps] f xclk0 2 k f xclk0 : ? brgc0 ? tps01 tps00 ????? k: brgc0 ? mdl04 mdl00 ?? (k = 8, 9, 10, ..., 31) 13-4. tps01 tps00 ? ?? (f xclk0 ) ? tps01 tps00 f prs = 2 mhz f prs = 5 mhz f prs = 10 mhz 0 0 tm51 ? 0 1 f prs /2 1 mhz 2.5 mhz 5 mhz 1 0 f prs /2 3 250 khz 625 khz 1.25 mhz 1 1 f prs /2 5 62.5 khz 156.25 khz 312.5 khz ? ? tm51 ?????? ? tm51 cr51 ??????? (tmc516 = 0) 8 ? / ? 51 ?? f/f ? (tmc511 = 1) ? pwm ?? (tmc516 = 1) 8 ? / ? 51 ????? = 50% r01uh0312cj0110 rev.1.10 275 2013.11.29 pd79f7023, 79f7024 ? ? uart0 (2) ? ?1?? ? (%) = ? 1 100 [%] ????? ???? ? 1. ?????? 2. ?? ?(4) ??? ? ?? ? ??? = 2.5 mhz = 2,500,000 hz brgc0 ? mdl04 mdl00 ?? = 10000b (k = 16) ?? = 76,800 bps = 2.5 m/(2 16) = 2,500,000/(2 16) = 78,125 [bps] = (78,125/76,800 ? 1) 100 = 1.725 [%] (3) ? 13-5. ? f prs = 2.0 mhz f prs = 5.0 mhz f prs = 10.0 mhz (bps) tps01, tps00 k ? err [%] tps01, tps00 k ? err [%] tps01, tps00 k ? err [%] 4800 2h 26 4808 0.16 3h 16 4883 1.73 ? ? ? ? 9600 2h 13 9615 0.16 3h 8 9766 1.73 3h 16 9766 1.73 10400 2h 12 10417 0.16 2h 30 10417 0.16 3h 15 10417 0.16 19200 1h 26 19231 0.16 2h 16 19531 1.73 3h 8 19531 1.73 24000 1h 21 23810 ? 0.79 2h 13 24038 0.16 2h 26 24038 0.16 31250 1h 16 31250 0 2h 10 31250 0 2h 20 31250 0 33600 1h 15 33333 ? 0.79 2h 9 34722 3.34 2h 19 32895 ? 2.1 38400 1h 13 38462 0.16 2h 8 39063 1.73 2h 16 39063 1.73 56000 1h 9 55556 ? 0.79 1h 22 56818 1.46 2h 11 56818 1.46 62500 1h 8 62500 0 1h 20 62500 0 2h 10 62500 0 76800 ? ? ? ? 1h 16 78125 1.73 2h 8 78125 1.73 115200 ? ? ? ? 1h 11 113636 ? 1.36 1h 22 113636 ? 1.36 153600 ? ? ? ? 1h 8 156250 1.73 1h 16 156250 1.73 312500 ? ? ? ? ? ? ? ? 1h 8 312500 0 625000 ? ? ? ? ? ? ? ? ? ? ? ? ? tps01, tps00: ??? 0(brgc0) ? 7 ? 6 ( ? (f xclk0 ) ) k: brgc0 mdl04 mdl00 ?? (k = 8, 9, 10, ..., 31) f prs : ???? err ? r01uh0312cj0110 rev.1.10 276 2013.11.29 pd79f7023, 79f7024 ? ? uart0 (4) ??? ??????? ? ?1??????? ? 13-12. ???? fl 1 data frame (11 fl) flmin flmax data frame length of uart0 start bit bit 0 bit 1 bit 7 parity bit minimum permissible data frame length maximum permissible data frame length stop bit start bit bit 0 bit 1 bit 7 parity bit latch timing stop bit start bit bit 0 bit 1 bit 7 parity bit stop bit ? 13-12 ??????? 0(brgc0) ??? ??(??)???? ? 11 ?? fl = (brate) -1 brate: uart0 k: brgc0 ?? fl: 1 ? ?:2 ? r01uh0312cj0110 rev.1.10 277 2013.11.29 pd79f7023, 79f7024 ? ? uart0 ?? flmin = 11 fl ? fl = fl k ? 2 2k 21k + 2 2k ?????? brmax = (flmin/11) ? 1 = brate 22k 21k + 2 ????? 10 k + 2 21k ? 2 11 2 k 2 k flmax = 11 fl ? fl = fl flmax = fl 11 21k ? 2 20k ????? brmin = (flmax/11) ? 1 = brate 20k 21k ? 2 ??? uart0 ?????? 13-6. / ? (k) 8 +3.53% ? 3.61% 16 +4.14% ? 4.19% 24 +4.34% ? 4.38% 31 +4.44% ? 4.47% ? 1. ????????? (k) ?????? (k) ?? ? 2. k:brgc0 ?? r01uh0312cj0110 rev.1.10 278 2013.11.29 pd79f7023, 79f7024 ? ? ? ? 14.1 ? ??? (1) ? ??????? (pr0l, pr0h, pr1l) ???? ? ?????????????? ?????? 14-1 ??? stop halt ?? ???? (2) ?? brk ??????????? 14.2 ? ???? 4 ?? 14-1 r01uh0312cj0110 rev.1.10 279 2013.11.29 pd79f7023, 79f7024 ? ? 14-1. ? (1/2) ? ?/ ? ? 1 ? ? 2 ? ? (a) 0 intlvi ?? ? 3 0004h 1 intp0 0006h 2 intp1 ? 0008h ? (b) 3 intcmp ?? 000ah 4 - 000ch 5 - 000eh 6 - 0010h - - 7 - - 0012h 8 intsr0 uart0 ? / ? 0014h ? (a) 9 intst0 uart0 ? 0016h - - 10 - - 0018h ? (a) 11 inttmh1 tmh1 cmp01 ? ( ???? ) 001ah 12 001ch - - 13 - - 001eh 14 inttm000 tm00 cr000 ? ( ???? ) ti010 ? ( ??? ) 0020h 15 inttm010 tm00 cr010 ? ( ???? ) ti000 ? ( ??? ) 0022h ? (a) 16 intad a/d ? 0024h 17 0026h - - 18 - - 0028h ? (a) 19 inttm51 ? 4 tm51 cr51 ? ( ???? ) 002ah - - 20 - - 002ch ? 1. (a)(c) ?? 14-1 (a)(c) ? 2. ?? 2 ?????????0? ??28? ? ? 3. ???(lvim)? 1 (lvimd) ? 4. ???? 8 ?/ 51 ? inttm5h1 ?????? 8-11 ? r01uh0312cj0110 rev.1.10 280 2013.11.29 pd79f7023, 79f7024 ? ? 14-1. ? (2/2) ? ?/ ? ? 1 ? ? 2 ? 21 002eh 22 0030h 23 0032h 24 0034h 25 0036h 26 0038h 27 003ah - - 28 - - 003ch ? (c) ? brk ? brk ? 003eh reset poc ? lvi ?? ? 3 ? ? ? wdt wdt 0000h ? 1. (a)(c) ?? 14-1 (a)(c) ? 2. ?? 2 ????????? 0 ?? 28 ? ? 3. ???(lvim)? 1 (lvimd) 1 r01uh0312cj0110 rev.1.10 281 2013.11.29 pd79f7023, 79f7024 ? ? ? 14-1. ??? (1/2) (a) ? internal bus interrupt request if mk ie pr isp priority controller vector table address generator standby release signal (b) ? (intpn, intcmp) internal bus interrupt request if mk ie pr isp priority controller vector table address generator standby release signal external interrupt edge enable register (egp, egn) edge detector ? n = 0, 1 if: ? ie: ? isp: ?? mk: ?? pr: ??? r01uh0312cj0110 rev.1.10 282 2013.11.29 pd79f7023, 79f7024 ? ? ? 14-1. ??? (2/2) (c) internal bus interrupt request priority controller vector table address generator if: ? ie: ? isp: ?? mk: ?? pr: ??? r01uh0312cj0110 rev.1.10 283 2013.11.29 pd79f7023, 79f7024 ? ? 14.3 ?? 6 ???? ? ??(if0l, if0h, if1l) ? ??? (mk0l, mk0h, mk1l) ? ???? (pr0l, pr0h, pr1l) ? ???(egp) ? ????(egn) ? ??(psw) ???????? 14-2 ? 14-2. ???? ? ?? ??? ? ? ? ? intlvi lviif if0l lvimk mk0l lvipr pr0l intp0 pif0 pmk0 ppr0 intp1 pif1 pmk1 ppr1 intcmp cmpif cmpmk cmppr intsr6 srif0 srmk0 srpr0 intst0 stif0 stmk0 stpr0 inttmh1 tmifh1 tmmkh1 tmprh1 inttm000 tmif000 tmmk000 tmpr000 pr0h inttm010 tmif010 if0h tmmk010 mk0h tmpr010 intad adif admk adpr inttm51 ? tmif51 if1l tmmk51 mk1l tmpr51 pr1l ? ???? 8 ?/ 51 ? inttm5h1 ?????? 8-11 ? r01uh0312cj0110 rev.1.10 284 2013.11.29 pd79f7023, 79f7024 ? ? (1) ?? (if0l, if0h, if1l) ????? 1 ???????? ? ??????? 1 8 ?? if0l if0h if1l if0l if0h ? 16 ? if0 ? 16 ??? ????? 00h ? 1. ??????? a/d ????? ?? 2. ?????? , ? 1 ?? (clr1) ? c ?? 1 ?? (clr1) ?? if0l.0 = 0;? ?_asm(?clr1 if0l, 0?);? 1 ? ? c ? 8 ??? if0l &= 0xfe;? ??? 3 ? mov a, if0l a, #0feh mov if0l, a ?mov a, if0l mov if0l, a ???????? (if0l) ?1 ?mov if0l, a ?? c ? 8 ? ???? r01uh0312cj0110 rev.1.10 285 2013.11.29 pd79f7023, 79f7024 ? ? ? 14-2. ?? (if0l, if0h, if1l) ?? ? ffe0h 00h r/w 7 6 5 4 <3> <2> <1> <0> if0l 0 0 0 0 cmpif pif1 pif0 lviif ? ffe1h 00h r/w <7> <6> 5 4 <3> 2 <1> <0> if0h tmif010 tmif000 0 0 tmifh1 0 stif0 srif0 ? ffe2h 00h r/w 7 6 5 4 <3> 2 1 <0> if1l 0 0 0 0 tmif51 0 0 adif xxifx ? 0 ?? 1 ??? ? ? if0l ? 4 7 if0h ? 2 4 ? 5 ? if1l ? 1 2 4 7 ? 0 r01uh0312cj0110 rev.1.10 286 2013.11.29 pd79f7023, 79f7024 ? ? (2) ??? (mk0l, mk0h, mk1l) ??/ ???? 1 8 ?? mk0l mk0h mk1l mk0l mk0h ? 16 ? mk0 ? 16 ??? ????? ffh ? 14-3. ??? (mk0l, mk0h, mk1l) ?? ? ffe4h ffh r/w 7 6 5 4 <3> <2> <1> <0> mk0l 1 1 1 1 cmpmk pmk1 pmk0 lvimk ? ffe5h ffh r/w <7> <6> 5 4 <3> 2 <1> <0> mk0h tmmk010 tmmk000 1 1 tmmkh1 1 stmk0 srmk0 ? ffe6h ffh r/w 7 6 5 4 <3> 2 1 <0> mk1l 1 1 1 1 tmmk51 1 1 admk xxmkx ? 0 1 ? ? ? mk0l ? 4 7 mk0h ? 2 4 ? 5 ? mk1l ? 1 2 4 7 ? 1 r01uh0312cj0110 rev.1.10 287 2013.11.29 pd79f7023, 79f7024 ? ? (3) ???? (pr0l, pr0h, pr1l) ??????? 1 8 ?? pr0l pr0h pr1lpr0l pr0h ? 16 ? pr0 ? 16 ??? ????? ffh ? 14-4. ???? (pr0l, pr0h, pr1l) ?? ? ffe8h ffh r/w 7 6 5 4 <3> <2> <1> <0> pr0l 1 1 1 1 cmppr ppr1 ppr0 lvipr ? ffe9h ffh r/w <7> <6> 5 4 <3> 2 <1> <0> pr0h tmpr010 tmpr000 1 1 tmprh1 1 stpr0 srpr0 ? ffeah ffh r/w 7 6 5 4 <3> 2 1 <0> pr1l 1 1 1 1 tmpr51 1 1 adpr xxprx ?? 0 ? 1 ? ? ? pr0l ? 4 7 pr0h ? 2 4 ? 5 ? pr1l ? 1 2 4 7 ? 1 r01uh0312cj0110 rev.1.10 288 2013.11.29 pd79f7023, 79f7024 ? ? (4) ??? (egp) ???? (egn) ?? intpn ? 1 8 ?? egp egn ????? 00h ? 14-5. ??? (egp) ???? (egn) ?? ? ff48h 00h r/w 7 6 5 4 3 2 1 0 egp 0 0 0 0 0 egp2 egp1 egp0 ? ff49h 00h r/w 7 6 5 4 3 2 1 0 egn 0 0 0 0 0 egn2 egn1 egn0 egpn egnn intpn ? 0 0 ?? 0 1 ? 1 0 1 1 ? ? ? egp ? 3 7 egn ? ? n = 0 2 14-3 egpn egnn ???? 14-3. egpn egnn ?? ? ?? ? l egp0 egn0 p30 intp0 egp1 egn1 p33 intp1 egp2 egn2 - intcmp ? ?????? , , ? egpn egnn 0? ???? remark n = 0 2 r01uh0312cj0110 rev.1.10 289 2013.11.29 pd79f7023, 79f7024 ? ? (5) ?? (psw) ??????????? psw ?/ ?? ie ?? ???? isp ? 8 / ?????? (ei di) ???? brk ?? pws ??? ie ??0 ????? ????? isp ??? push psw ?? psw ???? reti retb pop psw ?? psw ???? ?????? 02h ? 14-6. ????? <7> ie <6> z <5> rbs1 <4> ac <3> rbs0 2 0 <1> isp 0 cy psw after reset 02h isp high-priority interrupt servicing (low-priority interrupt disabled) ie 0 1 disabled priority of interrupt currently being serviced interrupt request acknowledgment enable/disable used when normal instruction is executed enabled interrupt request not acknowledged, or low- priority interrupt servicing (all maskable interrupts enabled) 0 1 r01uh0312cj0110 rev.1.10 290 2013.11.29 pd79f7023, 79f7024 ? ? 14.4 ? 14.4.1 ? ??ie ?1 ????????isp ?? 0 ?? ????? 17-4 ? ?????? 14-8 14-9 14-4. ??? ? ?? ? pr = 0 7 ? 32 ? pr = 1 8 ? 33 ? ? ????????? ? 1 ??1/fcpu (fcpu cpu ? ) ??????????? ???? ???????? ? 14-7 ?? ? psw pc ?? ie ??0? ??? ????? isp ????? pc ?? ?? reti ????? r01uh0312cj0110 rev.1.10 291 2013.11.29 pd79f7023, 79f7024 ? ? ? 14-7. ?? start if = 1? mk = 0? pr = 0? ie = 1? isp = 1? interrupt request held pending yes yes no no yes (interrupt request generation) yes no (low priority) no no yes yes no ie = 1? no any high-priority interrupt request among those simultaneously generated with pr = 0? yes (high priority) no yes yes no vectored interrupt servicing interrupt request held pending interrupt request held pending interrupt request held pending interrupt request held pending interrupt request held pending interrupt request held pending vectored interrupt servicing any high-priority interrupt request among those simultaneously generated? any high-priority interrupt request among those simultaneously generated with pr = 0? if: ? mk: ?? pr: ??? ie: ???? 1 = ? 0 = ? isp: ?????? 0 = ?? 1 = ?????? r01uh0312cj0110 rev.1.10 292 2013.11.29 pd79f7023, 79f7024 ? ? ? 14-8. ???? 8 clocks 7 clocks instruction instruction psw and pc saved, jump to interrupt servicing interrupt servicing program cpu processing if (pr = 1) if (pr = 0) 6 clocks ? 1 ??1/f cpu (f cpu cpu ?) ? 14-9. ????? 33 clocks 32 clocks instruction divide instruction psw and pc saved, jump to interrupt servicing interrupt servicing program cpu processing if (pr = 1) if (pr = 0) 6 clocks 25 clocks ? 1 ??1/f cpu (f cpu cpu ?) r01uh0312cj0110 rev.1.10 293 2013.11.29 pd79f7023, 79f7024 ? ? 14.4.2 ? ?? brk ?????? ????? (psw) ? (pc) ?? ie ?? 0 (003eh 003fh) ? pc ?? ?? retb ????? ? ?? reti ??? 14.4.3 ? ??????????????? ?? (ie = 1) ???????(ie = 0) ?? ????? ei ?? ie ?1 ?? ????????????????? ????????? ????????? ????????????????? ??????????? 14-5 ??? 14-10 ?? 14-5. ????? pr = 0 pr = 1 ie = 1 ie = 0 ie = 1 ie = 0 isp = 0 { { isp = 1 { { { { { { ? 1. : ? 2. : ?? 3. isp ie ? psw ?? isp = 0: ?? isp = 1: ??????? ie = 0: ?? ie = 1: ? 4. pr ? pr0l pr0h pr1l ?? pr = 0: ?? pr = 1: ?? r01uh0312cj0110 rev.1.10 294 2013.11.29 pd79f7023, 79f7024 ? ? ? 14-10. ?? (1/2) ? 1. 2 ?? main processing intxx servicing intyy servicing intzz servicing ei ei ei reti reti reti intxx (pr = 1) intyy (pr = 0) intzz (pr = 0) ie = 0 ie = 0 ie = 0 ie = 1 ie = 1 ie = 1 intxx ???? intyy intzz ???????? ei ??? ? 2. ???? main processing intxx servicing intyy servicing intxx (pr = 0) intyy (pr = 1) ei reti ie = 0 ie = 0 ei 1 instruction execution reti ie = 1 ie = 1 intxx ? intyy ? intxx ? intyy ?? ?????? pr = 0: ?? pr = 1: ?? ie = 0: ?? r01uh0312cj0110 rev.1.10 295 2013.11.29 pd79f7023, 79f7024 ? ? ? 14-10. ?? (2/2) ? 3. ???? main processing intxx servicing intyy servicing ei 1 instruction execution reti reti intxx (pr = 0) intyy (pr = 0) ie = 0 ie = 0 ie = 1 ie = 1 intxx ????? ei ???? intyy ? intyy ???????? pr = 0: ?? ie = 0: ?? r01uh0312cj0110 rev.1.10 296 2013.11.29 pd79f7023, 79f7024 ? ? 14.4.4 ?????????????????? ???? ? mov psw, #byte ? mov a, psw ? mov psw, a ? mov1 psw. bit, cy ? mov1 cy, psw. bit ? and1 cy, psw. bit ? or1 cy, psw. bit ? xor1 cy, psw. bit ? set1 psw. bit ? clr1 psw. bit ? retb ? reti ? push psw ? pop psw ? bt psw. bit, $addr16 ? bf psw. bit, $addr16 ? btclr psw. bit, $addr16 ? ei ? di ? if0l, if0h, if1l, mk0l, mk0h, mk1l, pr0l, pr0h pr1l ??? ? brk ???????? brk ???? ie ?? ??? brk ?????? ? 14-11 ????? ? 14-11. instruction n instruction m psw and pc saved, jump to interrupt servicing interrupt servicing program cpu processing if ? 1. ? n ? 2. ? m: ????? 3. pr ????? if??? r01uh0312cj0110 rev.1.10 297 2013.11.29 pd79f7023, 79f7024 ? ? 15.1 ? 15.1.1 ??????? (1) halt ?? ?? halt ? halt ?? halt ??cpu ??? halt ??????? ??????????? halt ?? ? stop ???????? (2) stop ?? ?? stop ? stop ?? stop ??, ????????????? ???? cpu ? ??????? x1 ??stop ????? ?????????? halt ?? ????????????? i/o ? ?? ? 1. stop ???? stop ???????????? 2. ????2 a/d ???? a/d ???? 0(adm0) ? 7 (adcs) ? 0 (adce) ??? a/d ?? stop ? 3. ? stop ?????? r01uh0312cj0110 rev.1.10 298 2013.11.29 pd79f7023, 79f7024 ? 15.1.2 ?? 2 ??? ? ?????(osts) ? ????(osts) ? ??/ ??????, ? ?? (1) ????? (ostc) ?? x1 ??????cpu ?????? x1 ??? x1 ???? 1 8 ?? ostc (? reset ?poc lvi wdt ? )? stop ? mstop(moc ? 7 ) = 1 ostc (00h) r01uh0312cj0110 rev.1.10 299 2013.11.29 pd79f7023, 79f7024 ? ? 15-1. ????? (osts) ?? ? ffa3h 00h r 7 6 5 4 3 2 1 0 ostc 0 0 0 most11 most 13 most14 most15 most16 most11 most13 mo st14 most15 most16 ???? f x = 10 mhz 1 0 0 0 0 2 11 /f x min. 204.8 s min. 1 1 0 0 0 2 13 /f x min. 819.2 s min. 1 1 1 0 0 2 14 /f x min. 1.64 ms min. 1 1 1 1 0 2 15 /f x min. 3.27 ms min. 1 1 1 1 1 2 16 /f x min. 6.55 ms min. ? 1. ??? most11 ?? 1 ??? 1 2. ???? osts ?????? cpu ?? stop ?????????? ? ? ostc ?? ? osts ??? ??? stop ?? osts ??? osts ????? 3. x1 ????????????? "a" ??? stop mode release x1 pin voltage waveform a ? f x :x1 ?? (2) ???? (osts) stop ????? x1 ????? cpu ?? x1 ?? stop ??? osts ??? cpu ????? stop ??? ostc ???????? ostc ?????? ? 1 8 ?? osts ???osts ? 05h r01uh0312cj0110 rev.1.10 300 2013.11.29 pd79f7023, 79f7024 ? ? 15-2. ???? (osts) ?? ? ffa4h 05h r/w 7 6 5 4 3 2 1 0 osts 0 0 0 0 0 osts2 osts1 osts0 osts2 osts1 osts0 ??? f x = 10 mhz 0 0 1 2 11 /f x 204.8 s 0 1 0 2 13 /f x 819.2 s 0 1 1 2 14 /f x 1.64 ms 1 0 0 2 15 /f x 3.27 ms 1 0 1 2 16 /f x 6.55 ms ? ? 1. cpu ? x1 ?? stop ??? stop ??? osts 2. x1 ?????? osts ? 3. ???? osts ?????? cpu ?? stop ?????????? ? ? ostc ?? ? osts ??? ??? stop ?? osts ??? osts ????? 4. x1 ????????????? "a" ??? stop mode release x1 pin voltage waveform a ? f x :x1 ?? r01uh0312cj0110 rev.1.10 301 2013.11.29 pd79f7023, 79f7024 ? 15.2 ? 15.2.1 halt ?? (1) halt ?? ?? halt ?? halt ??? cpu ????????? halt ?? halt ?????? 15-1. halt ???? cpu ????? halt ?? halt ?? ? cpu ??? (f ih ) ? cpu ? x1 ? (f x ) ? cpu ????? (f ih ) ? ??? ?? cpu ? f ih ( ??? ) halt ????? f x halt ????? ( ??? ) halt ????? ??? f exclk ????? ( ??? ) f il halt ????? cpu ?? ram ?? halt ????? 16 ?/ ? 00 8 ?/ ? 51 8 ? h1 ? ?? ???? ? ??? ? ???????? a/d ? ? 01 ? ? uart0 ? ??? ? ? ? f ih : ??? f x : x1 ? f exclk : ????? f il : ?? r01uh0312cj0110 rev.1.10 302 2013.11.29 pd79f7023, 79f7024 ? (2) halt ?? ???? halt ?? (a) ? ? halt ????????? ?? ? 15-3. ??? halt ?? halt instruction wait note normal operation halt mode normal operation oscillation high-speed system clock, or internal high-speed oscillation clock status of cpu standby release signal interrupt request ? ?? ? ??11 12 ? ? ??4 5 ? ? ????? r01uh0312cj0110 rev.1.10 303 2013.11.29 pd79f7023, 79f7024 ? (b) ??? halt ?? ??? halt ???????????? ? 15-4. ? halt ?? (1) ??? cpu ?? halt instruction reset signal high-speed system clock (x1 oscillation) halt mode reset period oscillates oscillation stopped oscillates status of cpu normal operation (high-speed system clock) oscillation stabilization time (2 11 /f x to 2 16 /f x ) note normal operation (internal high-speed oscillation clock) oscillation stopped starting x1 oscillation is specified by software. reset processing (12 to 51 s) ? ???? (f exclk ) ???????? (2) ?? cpu ?? halt instruction reset signal internal high-speed oscillation clock normal operation (internal high-speed oscillation clock) halt mode reset period normal operation (internal high-speed oscillation clock) oscillates oscillation stopped oscillates status of cpu wait for oscillation accuracy stabilization (102 to 407 s) reset processing (12 to 51 s) ? f x :x1 ?? r01uh0312cj0110 rev.1.10 304 2013.11.29 pd79f7023, 79f7024 ? 15-2. halt ???? ? mk pr ie isp 0 0 0 ???? 0 0 1 ?? 0 1 0 1 0 1 0 ???? 0 1 1 1 ?? 1 halt ?? ? ? : r01uh0312cj0110 rev.1.10 305 2013.11.29 pd79f7023, 79f7024 ? 15.2.2 stop ?? (1) stop ???? ?? stop ? stop ??? cpu ??????? stop ?? ? ????????? ???? stop ? stop ?? halt ??? osts ??? ?????? stop ????? 15-3. stop ???? cpu ????? stop ?? stop ?? ? cpu ??? (f ih ) ? cpu ? x1 ? (f x ) ? cpu ????? (f ih ) ? ??? ?? cpu ? f ih f x ?? ??? f exclk f il stop ????? cpu ?? ram ?? stop ????? 16 ?/ ? 00 ?? 8 ?/ ? 51 ti51 ??? 8 ? h1 ?f il , f il /2 7 , f il /2 9 ??? ?? ?????????????? ? a/d ? ?? ? 0,1 ? ? ? ? uart0 8 ? / ? 51 ??? tm51 ??? ? ??? ? ? ? f ih : ??? f x : x1 ? f exclk : ????? f il : ?? r01uh0312cj0110 rev.1.10 306 2013.11.29 pd79f7023, 79f7024 ? ? 1. ? stop ?????? stop ??????? ? 2. ???????? stop ????? stop ????? stop ??????? stop ? 3. ???? (x1 ) cpu ?? stop ?????? stop ????2 cpu ???? <1> rstop ?0?( ?? ) <2> mcm0 ?0?( cpu x1 ? ) <3> ? mcs ? ?0? ( ? cpu ? ) <4> ? rsts ? ?1?( ???? ) <5> ? stop ? stop ???? cpu ??????? (x1 ??????? ???? (ostc) ??? 4. ?? (rsts = 1) ??? stop ? r01uh0312cj0110 rev.1.10 307 2013.11.29 pd79f7023, 79f7024 ? (2) stop ?? ? 15-5. stop ???????? stop mode stop mode release high-speed system clock (x1 oscillation) high-speed system clock (external clock input) internal high-speed oscillation clock high-speed system clock (x1 oscillation) is selected as cpu clock when stop instruction is executed high-speed system clock (external clock input) is selected as cpu clock when stop instruction is executed internal high-speed oscillation clock is selected as cpu clock when stop instruction is executed wait for oscillation accuracy stabilization note 1 halt status (oscillation stabilization time set by osts) clock switched by software clock switched by software high-speed system clock high-speed system clock wait note 2 wait note 2 high-speed system clock internal high-speed oscillation clock ? 1. ?????? ? rmc ? = 00h: 102 407 s ? rmc ? = 56h/59h: 120 481 s 2. ? ? ??17 18 ? ? ??11 12 ? r01uh0312cj0110 rev.1.10 308 2013.11.29 pd79f7023, 79f7024 ? ???? stop ?? (a) ? ? stop ????????? ????? ? 15-6. ? stop ?? (1/2) (1) ??? (x1 ?? cpu ?? normal operation (high-speed system clock) normal operation (high-speed system clock) oscillates oscillates stop instruction stop mode wait (set by osts) standby release signal oscillation stabilization wait (halt mode status) oscillation stopped high-speed system clock (x1 oscillation) status of cpu oscillation stabilization time (set by osts) interrupt request (2) ??? ( ??? cpu ?? interrupt request stop instruction standby release signal status of cpu high-speed system clock (external clock input) normal operation (high-speed system clock) oscillates stop mode oscillation stopped wait note normal operation (high-speed system clock) oscillates ? ? ? ??17 18 ? ? ??11 12 ? ? ????? r01uh0312cj0110 rev.1.10 309 2013.11.29 pd79f7023, 79f7024 ? ? 15-6. ? stop ?? (2/2) (3) ?? cpu ?? wait note 1 wait for oscillation accuracy stabilization note 2 oscillates normal operation (internal high-speed oscillation clock) stop mode oscillation stopped oscillates normal operation (internal high-speed oscillation clock) internal high-speed oscillation clock status of cpu standby release signal stop instruction interrupt request ? 1. ?? ? ??17 18 ? ? ??11 12 ? 2. ?????? ? rmc ? = 00h 102 407 s ? rmc ? = 56h/59h 120 481 s ? ????? (b) ????? ??? stop ???????????? r01uh0312cj0110 rev.1.10 310 2013.11.29 pd79f7023, 79f7024 ? ? 15-7. ? stop ?? (1) ??? cpu ?? stop instruction reset signal high-speed system clock (x1 oscillation) normal operation (high-speed system clock) stop mode reset period normal operation (internal high-speed oscillation clock) oscillates oscillation stopped oscillates status of cpu oscillation stabilization time (2 11 /f x to 2 16 /f x ) note oscillation stopped starting x1 oscillation is specified by software. oscillation stopped reset processing (12 to 51 s) ? ???? (f exclk ) ???????? ? f x :x1 ?? (2) ?? cpu ?? stop instruction reset signal internal high-speed oscillation clock normal operation (internal high-speed oscillation clock) stop mode reset period normal operation (internal high-speed oscillation clock) oscillates oscillation stopped status of cpu oscillates oscillation stopped reset processing (12 to 51 s) wait for oscillation accuracy stabilization (102 to 407 s) r01uh0312cj0110 rev.1.10 311 2013.11.29 pd79f7023, 79f7024 ? 15-4. stop ???? ? mk pr ie isp 0 0 0 ???? 0 0 1 ?? 0 1 0 1 0 1 0 ???? 0 1 1 1 ?? 1 stop ?? ? ? : r01uh0312cj0110 rev.1.10 312 2013.11.29 pd79f7023, 79f7024 ? ? 4 ??? (1) reset ?? (2) ????? (3) ?(poc)??????? (4) ??(lvi) ??????? ???????? 0000h 0001h ?? reset ????? poc lvi ????? 16-1 16-2 ??????????? reset ??? reset ?????????? ??????????????? 16-2 16-4 v dd v por v dd v lvi ? poc lvi ?????????? ( ? ? ? ?? ) 2013.11.29 ? 1. ?? reset ?????? 10 s ( ???? (v dd < 1.8 v) ?? 10 s poc ????? ) 2. ???? x1 ??????????????? 3. ? stop ????? stop ?? ram ?? sfr ?? ??? r01uh0312cj0110 rev.1.10 313 pd79f7023, 79f7024 ? ? 16-1. ??? lvirf wdtrf reset control flag register (resf) internal bus watchdog timer reset signal reset power-on-clear circuit reset signal low-voltage detector reset signal reset signal reset signal to lvim/lvis register clear set clear set resf register read signal ? lvi ?? lvi ? ? 1. lvim: ??? 2. lvis: ????? r01uh0312cj0110 rev.1.10 314 2013.11.29 pd79f7023, 79f7024 ? ? 16-2. reset ?? delay delay hi-z normal operation status of cpu reset period (oscillation stop) normal operation (internal high-speed oscillation clock) reset internal reset signal port pin high-speed system clock (when x1 oscillation is selected) internal high-speed oscillation clock starting x1 oscillation is specified by software. reset processing wait for oscillation accuracy stabilization (102 to 407 s) (12 to 51 s) ? 16-3. ???? normal operation reset period (oscillation stop) watchdog timer overflow internal reset signal hi-z port pin high-speed system clock (when x1 oscillation is selected) internal high-speed oscillation clock starting x1 oscillation is specified by software. normal operation (internal high-speed oscillation clock) reset processing status of cpu wait for oscillation accuracy stabilization (102 to 407 s) (12 to 51 s) ? ???????? r01uh0312cj0110 rev.1.10 315 2013.11.29 pd79f7023, 79f7024 ? ? 16-4. stop ??? reset ?? delay normal operation status of cpu reset period (oscillation stop) reset internal reset signal stop instruction execution stop status (oscillation stop) high-speed system clock (when x1 oscillation is selected) internal high-speed oscillation clock hi-z port pin starting x1 oscillation is specified by software. normal operation (internal high-speed oscillation clock) reset processing delay wait for oscillation accuracy stabilization (102 to 407 s) (12 to 51 s) ? ???????? ? ? ? ?? r01uh0312cj0110 rev.1.10 316 2013.11.29 pd79f7023, 79f7024 ? 16-1. ??? ? ? ??? ?? cpu ? f ih ?? f x ?? x1 x2 ???? ??? f exclk ? (exclk ???? ) f il cpu ?? ram ?? ( ????? ) ?? 16 ?/ ? 00 8 ?/ ? 51 8 ? h1 ?? a/d ? ? 0(amp0) ? 1(amp1) ? ? uart0 ? ?? ? ??? ?? ( ,lvi ? on-chip ? ?? ? f ih : ??? f x : x1 ? f exclk : ????? f il : ?? r01uh0312cj0110 rev.1.10 317 2013.11.29 pd79f7023, 79f7024 ? 16-2. ??? (1/3) ? ??? ? 1 pc ? (0000h, 0001h) ?? sp) ? ?? (psw) 02h ?? ? ? 2 ram ?? ? ? 2 ??? 2, 3, 12 (p2, p3, p12) ( ) 00h ???? 2, 3, 12 (pm2, pm3, pm12) ffh ?? 3(pu3) 00h ?? 12(pu12) 20h ??? (rstmask) 00h ??? (ims) cfh ? 3 ? 1. ?????????? pc ??????? 2. ??????? 3. ???rom ?????????? ? ims rom ? ram pd79f7023 42h 8 kb 512 ? pd79f7024 04h 16 kb 768 ? r01uh0312cj0110 rev.1.10 318 2013.11.29 pd79f7023, 79f7024 ? 16-2. ??? (2/3) ? ??? ? 1 ?????? (oscctl) 00h ???? (pcc) 01h ???? (rcm) 80h osc ?? (moc) 80h ???? (mcm) 00h ????? (osts) 00h ???? (osts) 05h ?/ 00(tm00) 0000h ?/ ??? 000, 010 (cr000, cr010) 0000h ???? 00(tmc00) 00h ???? 00 (prm00) 00h ?/ ???? 00 (crc00) 00h 16 ?/ ? 00 ??? 00(toc00) 00h ?/ 51(tm51) 00h ??? 51 (cr51) 00h ???? 51(tcl51) 00h 8 ?/ ? 51 ???? 51(tmc51) 00h ??? 01, 11 (cmp01, cmp11) 00h ??? (tmhmd1) 00h 8 ? h1 ??? 1(tmcyc1) 00h ?? ? (wdte) 1ah/9ah ? 2 8 a/d ?? h(adcrh) 00h ??? (adm) 00h ???? (ads) 00h a/d ? a/d ?? (adpc) 00h ? 0(amp0) ? 1(amp1) ??? (ampm) 00h ??? (cmpctl) 00h ? ??? (cmppc) 00h ?? 0(rxb0) ffh ?? 0(txs0) ffh ?????? 0(asim0) 01h ??????? 0 (asis0) 00h ? uart0 ??? 0(brgc0) 1fh ? 1. ?????????? pc ??????? 2. ???? wdte ? r01uh0312cj0110 rev.1.10 319 2013.11.29 pd79f7023, 79f7024 ? 16-2. ??? (3/3) ? ??? ? 1 ??? (resf) 00h ? 2 ??? (lvim) 00h ? 2 ?? ????? (lvis) 00h ? 2 ?? 0l, 0h, 1l (if0l, if0h, if1l) 00h ?? 0l, 0h, 1l (if0l, if0h, if1l) ffh ???? 0l, 0h, 1l (pr0l, pr0h, pr1l) ffh ?? (egp) 00h ??? (egn) 00h ? ????? (rmc) 00h ? 1. ?????????? pc ??????? 2. ?????? ? ? reset ? poc ? wdt ? lvi (lvi ? ? ) ? lvi ? ? wdtrf ? ?1 resf lvirf ? 0 0 ?1 0 lvim lvis (00h) (00h) (00h) (00h) r01uh0312cj0110 rev.1.10 320 2013.11.29 pd79f7023, 79f7024 ? 16.1 ????? pd79f7023 79f7024 ?????? (resf) ?? ? ? 8 ??? resf reset ??(poc)??? resf ? resf (00h) 2013.11.29 ? 16-5. ??? (resf) ? ? ffach 00h ? r 7 6 5 4 3 2 1 0 resf 0 0 0 wdtrf 0 0 0 lvirf wdtrf ??? (wdt) 0 ? resf ? 1 ? lvirf ??? (lvi) 0 ? resf ? 1 ? ? ???? ? ?? 1 ???? ? resf ?? 16-3 ? 16-3. ? resf ?? ? ? reset ? poc ? wdt ? lvi (lvi ? ? ) ? lvi ? ? wdtrf ?1 lvirf 0 0 ?1 0 r01uh0312cj0110 rev.1.10 321 pd79f7023, 79f7024 ? ? ? ? 17.1 ? ?(poc)1? (1) 1.59v poc ?? ( ??? lvistart = 0) ? ??????(v dd )?(v poc = 1.59 v 0.15 v) ??? ? ?(v dd )??(v poc = 1.59 v 0.15 v) ??v dd < v poc ????v dd v poc ? (2) 2.7 v/1.59 v poc ?? ( ?? :lvistart = 1) ? ??????(v dd )?(v ddpoc = 2.7 v 0.2 v) ??? ? ?(v dd ) ??(v poc = 1.59 v 0.15 v) ?? v dd < v poc ??? v dd v ddpoc ???? ? poc ?????? (resf) ? 00h ? pd79f7023 79f7024 ?????????? (wdt) ?? ?(lvi) ???????????? (resf) ? wdt lvi ???resf ? 00h ?? 1 resf ?? r01uh0312cj0110 rev.1.10 322 2013.11.29 pd79f7023, 79f7024 ? ? 17.2 ? ????? 17-1 ? ? 17-1. ???? ? + reference voltage source internal reset signal v dd v dd 17.3 ? ? ??????(v dd )?(v poc = 1.59 v 0.15 v) ??? ? ?????? (lvi) ?? (v dd ) 2.7 v 0.1 v ????? ? ?(v dd )??(v poc = 1.59 v 0.15 v) ?? v dd < v pdr ???? ????????? r01uh0312cj0110 rev.1.10 323 2013.11.29 pd79f7023, 79f7024 ? ? ? 17-2. ??????? 1/2 (1) 1.59 v poc ?? ( ?? :lvistart = 0) internal high-speed oscillation clock (f ih ) high-speed system clock (f xh ) (when x1 oscillation is selected) starting oscillation is specified by software v lvi operation stops v poc = 1.59 v (typ.) starting oscillation is specified by software cpu 0 v supply voltage (v dd ) 2.7 v note 1 0.5 v/ms (min.) note 2 starting oscillation is specified by software wait for oscillation accuracy stabilization (102 to 407 s) note 3 reset processing (12 to 51 s) set lvi to be used for reset set lvi to be used for reset set lvi to be used for interrupt normal operation (internal high-speed oscillation clock) note 4 operation stops reset period (oscillation stop) reset period (oscillation stop) normal operation (internal high-speed oscillation clock) note 4 normal operation (internal high-speed oscillation clock) note 4 reset processing (12 to 51 s) internal reset signal wait for voltage stabilization wait for oscillation accuracy stabilization (102 to 407 s) wait for oscillation accuracy stabilization (102 to 407 s) note 3 (0.93 to 3.7 ms) reset processing (12 to 51 s) wait for voltage stabilization (0.93 to 3.7 ms) ? 1. ? 2.7 v v dd 5.5 v ??????? 2.7v ??????? ??????? reset ? 2. ?? 2.7v 0.5v/ms( ?)????? 2.7v ????? reset ? 3. ?????????????? 4. ??????? cpu ??? x1 ??? ostc ???? ??? ? ?? , ???? ( ? ?? ) ? v lvi lvi ? v poc ? r01uh0312cj0110 rev.1.10 324 2013.11.29 pd79f7023, 79f7024 ? ? ? 17-2. ???????? 2/2 (2) 2.7 v/1.59 v poc ?? ( ?? :lvistart = 1) 0 v supply voltage (v dd ) v lvi v poc = 1.59 v (typ.) 2.7 v note 1 internal high-speed oscillation clock (f ih ) high-speed system clock (f xh ) (when x1 oscillation is selected) operation stops cpu internal reset signal wait for oscillation accuracy stabilization (102 to 407 s) wait for oscillation accuracy stabilization (102 to 407 s) starting oscillation is specified by software starting oscillation is specified by software note 3 poc processing time (0.93 to 3.7 ms) reset processing time (12 to 51 s) normal operation (internal high-speed oscillation clock) note 2 reset period (oscillation stop) reset processing time (12 to 51 s) normal operation (internal high-speed oscillation clock) note 2 reset period (oscillation stop) note 3 poc processing time (0.93 to 3.7 ms) reset processing time (12 to 51 s) normal operation (internal high-speed oscillation clock) note 2 operation stops starting oscillation is specified by software wait for oscillation accuracy stabilization (102 to 407 s) set lvi to be used for interrupt set lvi to be used for reset set lvi to be used for reset ? 1. ?? 2.7 v v dd 5.5 v ????? 2.7v ???????? ?????? reset ? 2. ??????? cpu ??? x1 ??? ostc ???? ??? 3. ??(1.59 v( ?))??? ? 1.59 v ( ?) 2.7 v ( ?) ??3.7 ms 1.59 v ( ?) ?? 1.0 3.8 ms poc ?? ? 1.59 v ( ?) 2.7 v ( ?) ??3.7 ms 2.7 v ( ?) ?? 12 51 s poc ?? ? ?? , ???? ( ? ?? ) ? v lvi lvi ? v poc ? r01uh0312cj0110 rev.1.10 325 2013.11.29 pd79f7023, 79f7024 ? ? 17.4 ?? ???? (v dd ) ??(v poc ) ???? ????? ?????? < > ??????????????????? ? 17-3. ? (1/2) ? ?????? 50ms ? ; check the reset source note 2 note 1 reset initialization processing <1> 50 ms has passed? (tmifh1 = 1?) initialization processing <2> setting 8-bit timer h1 (to measure 50 ms) ; initial setting for ports, setting of division ratio of system clock, such as setting of timer or a/d converter. yes no power-on-clear clearing wdt ;f prs = internal high-speed oscillation clock (default) set the count clock and compare value so that inttmh1 occurs after 50 ms have elapsed. timer starts (tmhe1 = 1). ? 1. ???|?? <2> 2. ???? r01uh0312cj0110 rev.1.10 326 2013.11.29 pd79f7023, 79f7024 ? ? ? 17-3. ? (2/2) ? ?? yes no check reset source power-on-clear/external reset generated reset processing by watchdog timer reset processing by low-voltage detector no wdtrf of resf register = 1? lvirf of resf register = 1? yes r01uh0312cj0110 rev.1.10 327 2013.11.29 pd79f7023, 79f7024 ? ?? ? ?? 18.1 ?? ??1? ? ??(v dd ) lvi ? (v lvi ) ?????? ? ??????(lvi) ? on ?? on ?? v poc = 1.59 v ( ?) ? ???? (v dd ) < lvi ?(v lvi = 2.7 v 0.1 v) ????????? (v dd ) < lvi ?(v lvi = 2.7 v 0.1 v) ??? ? ??????? ? ??? 11 ????? (v lvi ) ? stop ?? ?????? ? (lvimd = 1) ? (lvimd = 0) v dd < v lvi ?? ?v dd v lvi ? ? v dd v lvi (v dd < v lvi ) (v dd v lvi ) ? ??? ? lvisel ???(lvim) 2 lvimd lvim 1 ?????????(lvif: lvim ? 0 ) ????? ????? ??????(resf)? 0 (lvirf) ?1? resf ?? r01uh0312cj0110 rev.1.10 328 2013.11.29 pd79f7023, 79f7024 ? ?? 18.2 ?? ?????? 18-1 ? ? 18-1. ???? lvis1 lvis0 lvion ? + reference voltage source internal bus n-ch low-voltage detection level selection register (lvis) low-voltage detection register (lvim) lvis2 lvis3 lvif intlvi internal reset signal 4 lvimd low-voltage detection level selector selector v dd v dd r01uh0312cj0110 rev.1.10 329 2013.11.29 pd79f7023, 79f7024 ? ?? 18.3 ???? ???? ? ???(lvim) ? ?????(lvis) (1) ??? (lvim) ??????? 1 8 ???? lvi ???? r01uh0312cj0110 rev.1.10 330 2013.11.29 pd79f7023, 79f7024 ? ?? ? 18-2. ??? (lvim) ?? lvion ? 3, 4 ?? 0 ? 1 lvimd ? 3 ???? / ? 0 ?? v dd lvi ? v lvi )(v dd < v lvi ) (v dd v lvi ) ? ?? 1 ?? (v dd ) < lvi ? (v lvi ) ???? v dd v lvi ? ? lvif ??? 0 ?? (v dd ) lvi ? (v lvi ) ? lvi ? 1 ?? (v dd ) < lvi ? (v lvi ) ? 1. ??????? lvi (lvi ??)?, ?? 00h ??? 00h 2. 0 ? 3. lvi ??lvion lvimd ? lvi ?? 4. lvion 1 ? lvi ???? lvion 1 ????? (10 s(?)) ????? lvi ? lvif 1 ?? 200s ( ? 200s) ? 1. ???k?? lvi ? ? 8 ?? 00h lvim. ? ? 1 ?? lvion ? 2. ?? lvimd = 0 ? lvi ??? v dd Q? v lvi ?? lvi lvion ?? (intlvi) lviif ? ?1? r01uh0312cj0110 rev.1.10 331 2013.11.29 pd79f7023, 79f7024 ? ?? (2) ????? (lvis) ?????? 1 8 ???? ????00h ? 18-3. ????? (lvim) ? lvis3 lvis2 lvis1 lvis0 ? 0 0 0 0 v lvi0 (4.24 0.1 v) 0 0 0 1 v lvi1 (4.09 0.1 v) 0 0 1 0 v lvi2 (3.93 0.1 v) 0 0 1 1 v lvi3 (3.78 0.1 v) 0 1 0 0 v lvi4 (3.62 0.1 v) 0 1 0 1 v lvi5 (3.47 0.1 v) 0 1 1 0 v lvi6 (3.32 0.1 v) 0 1 1 1 v lvi7 (3.16 0.1 v) 1 0 0 0 v lvi8 (3.01 0.1 v) 1 0 0 1 v lvi9 (2.85 0.1 v) 1 0 1 0 v lvi10 (2.70 0.1 v) ? ???? lvi ? lvi ?????lvis ?????? ??00h ??? 00h ? 1. ? 4 7 ? 2. lvi ??? lvis ? r01uh0312cj0110 rev.1.10 332 2013.11.29 pd79f7023, 79f7024 ? ?? 18.4 ?? ?????? (1) ? (lvimd = 1) ? ???(v dd ) lvi ? (v lvi ) ??v dd < v lvi ???? v dd v lvi ?? ? ??????(lvi) ? on ??on ?? v poc = 1.59 v( ?) ???? (v dd ) < ?(v lvi = 2.70 v 0.1 v) ???? (2) (lvimd = 0) ? ??(v dd ) lvi ? (v lvi )?? v dd v lvi (v dd < v lvi ) (v dd v lvi ) ?? (intlvi) ?????????(lvif: lvim ? 0 ) ????? ??? ? lvimd ???(lvim) 1 r01uh0312cj0110 rev.1.10 333 2013.11.29 pd79f7023, 79f7024 ? ?? 18.4.1 ? (1) 1.59 v poc ?? (lvistart = 0) ? ?? <1> lvi (lvimk = 1) <2> ??????? (lvis)? 3 0 (lvis3 lvis0) lvi ? <3> lvim ? 7 (lvion)1 ( lvi ) <4> ????(10 s(?)) <5> ? lvim ? 0 ???? (v dd ) lvi ? (v lvi ) <6> lvim ? 1 (lvimd) 1 (??) ? 18-4 ??????????? <1> <6>? ? 1. ? <1> lvimk = 0 ?? 1<3> ?? 2. lvimd ?1? ??? (v dd ) lvi ? (v lvi ) ???? ? ??? ?? ? ? 8 ?? 00h lvim ? ? 1 ?? lvimd lvion ?? r01uh0312cj0110 rev.1.10 334 2013.11.29 pd79f7023, 79f7024 ? ?? ? 18-4. ?????? (lvistart = 0) <1> <3> <4> <5> <6> v lvi v poc = 1.59 v (typ.) internal reset signal set lvi to be used for reset supply voltage (v dd ) lvimk flag (set by software) time h note 1 lvion flag (set by software) not cleared not cleared not cleared not cleared wait time <2> cleared cleared cleared lvif flag lvimd flag (set by software) lvirf flag note 3 lvi reset signal cleared by software cleared by software poc reset signal note 2 ? 1. ???? lvimk ?1 2. ?? lviif ? lvif ??1 3. lvirf ????(resf)? 0 ? resf ? ? 1. ? 18-4 <1> <6> 18.4.1 1 lvi ??? (lvistart = 0) ? <1> <6> ? 2. v poc ? r01uh0312cj0110 rev.1.10 335 2013.11.29 pd79f7023, 79f7024 ? ?? (2) 2.7 v/1.59 v poc ?? (lvistart = 1) ???? 18.4.1(1) lvi ???? ? 18-5. ?????? (lvistart = 1) v lvi set lvi to be used for reset v lvi = 2.70 v (typ.) v poc = 1.59 v (typ.) supply voltage (v dd ) lvimk flag (set by software) lvion flag (set by software) lvif flag lvimd flag (set by software) lvirf flag note 3 internal reset signal lvi reset signal poc reset signal time cleared cleared cleared not cleared not cleared not cleared not cleared cleared by software cleared by software h note 1 <4> wait time note 2 <5> <6> <2> <3> <1> ? 1. ???? lvimk ?1 2. ?? lviif ? lvif ??1 3. lvirf ????(resf)? 0 resf ? ? 1. ? 18-5 <1> <6> 18.4.1 1 lvi ??? (lvistart = 0) ? <1> <6> ? 2. v poc ? r01uh0312cj0110 rev.1.10 336 2013.11.29 pd79f7023, 79f7024 ? ?? 18.4.2 (1) lvi ?????? (lvistart = 0) ? ?? <1> lvi (lvimk = 1). <2> ???????(lvis)? 3 0 (lvis3 lvis0) lvi ? <3> lvim ? 1 (lvimd) (??)?? <4> lvim ? 7 (lvion)?1?( lvi ) <5> ????(10 s(?)) <6> lvim ? 0 (lvif) v dd ??, ????(v dd ) lvi ?(v lvi ) v dd ?????(v dd ) < lvi ?(v lvi ) <7> lvi(lviif) ?? <8> lvi(lviif) ?? <9> ? ei ?(??) ? 18-6 ?????????? <1> <8>? ? ??? ?? ? ? 8 ?? 00h lvim ? ? 1 ?? lvion ? r01uh0312cj0110 rev.1.10 337 2013.11.29 pd79f7023, 79f7024 ? ?? ? 18-6. ????? (lvistart = 0) intlvi <1> <2> <6> <7> <4> l v lvi v poc = 1.59 v (typ.) internal reset signal supply voltage (v dd ) lvimk flag (set by software) lvion flag (set by software) lvimd flag (set by software) lvif flag lviif flag cleared by software <8> cleared by software <5> wait time note 3 note 2 note 2 note 2 note 1 note 3 time <3> ? 1. ???? lvimk ?1 2. ?(intlvi) ?,lvif lviif ?1 3. ??v dd Q?v lvi ?? lvi lvion ?? (intlvi) lviif 1 ? 1. ? 18-6 <1> <8> 18.4.1 1 lvi ??? (lvistart = 0) ? <2> <8> ? 2. v poc ? r01uh0312cj0110 rev.1.10 338 2013.11.29 pd79f7023, 79f7024 ? ?? (2) lvi ???? (lvistart = 1) ???? 18.4.1(2) lvi ???? ? 18-7. ????? (lvistart = 1) l v lvi v lvi = 2.70 v (typ.) v poc = 1.59 v (typ.) supply voltage (v dd ) lvimk flag (set by software) lvif flag intlvi lviif flag lvion flag (set by software) lvimd flag (set by software) internal reset signal time note 3 note 3 <8> cleared by software <2> <1> note 1 <4> <6> <3> <5> wait time note 2 note 2 note 2 <7> cleared by software ? 1. ???? lvimk ?1 2. ?? lviif ? lvif ??1 3. ??v dd Q?v lvi ?? lvi lvion ?? (intlvi) lviif ?1 ? 1. ? 18-7 <1> <8> 18.4.1 1 lvi ? (lvistart = 1) ? <2> <8>? 2. v poc : ? r01uh0312cj0110 rev.1.10 339 2013.11.29 pd79f7023, 79f7024 ? ?? 18.5 ??? ??(v dd ) ? lvi ?(v poc ) ??????????2 ? 1 ?? ?????/ ????? < > ???????????????????? 18- 8 r01uh0312cj0110 rev.1.10 340 2013.11.29 pd79f7023, 79f7024 ? ?? ? 18-8. ? (1/2) ? ? lvi ????? 50ms ? ; check the reset source note ; setting of detection level by lvis. the low-voltage detector operates (lvion = 1). reset initialization processing <1> initialization processing <2> yes no setting lvi clearing wdt detection voltage or higher (lvif = 0?) yes no ; the timer counter is cleared and the timer is started. lvi reset ;f prs = internal high-speed oscillation clock (default) set the count clock and compare value so that inttmh1 occurs after 50 ms have elapsed. timer starts (tmhe1 = 1). setting 8-bit timer h1 (to measure 50 ms) restarting timer h1 (tmhe1 = 0 tmhe1 = 1) 50 ms has passed? (tmifh1 = 1?) ; initial setting for ports, setting of division ratio of system clock, such as setting of timer or a/d converter. ? ???? r01uh0312cj0110 rev.1.10 341 2013.11.29 pd79f7023, 79f7024 ? ?? ? 18-8. ? (2/2) ? ?? yes no check reset source power-on-clear/external reset generated reset processing by watchdog timer reset processing by low-voltage detector yes wdtrf of resf register = 1? lvirf of resf register = 1? no ? 2 ? ?? ? < > lvi ??????? (lvim) ? 0 (lvif) v dd ???? ? (v dd ) lvi ? (v lvi ) v dd ???? (v dd ) < lvi ? (v lvi ) ?? 0l(if0l) ? 1 (lviif) ? ???? lvi ???????????? r01uh0312cj0110 rev.1.10 342 2013.11.29 pd79f7023, 79f7024 ? ? ? ? 19.1 ? pd79f7023 79f7024 ??????????? regc ? v ss (0.47 1 f: ?)???????? stop ??? ? 0.47 f ????????? ???? 2.5 v( ?)???? 1.9v ? 19.2 ?? (1) ????? (rmc) ???????? ? 8 ?? rmc ????(00h) ? 19-1. ????? (rmc) ?? ? ff3dh :00h r/w 7 6 5 4 3 2 1 0 rmc rmc[7:0] ?? 59h ??? ( ? 1.9 v) cpu ?(f cpu ) 4 mhz ? 56h ??? ( ? 1.9 v) cpu ???? f cpu 1 mhz ????? 56h 00h ???? 2.5v ? ? 1. rmc ??? 56h/59h ? 00h ? 4mhz ? cpu ?? rmc ?? 22 s ? pcc rcm 2. ????????? rmc ? pd79f7023, 79f7024 ? ? 19.3 ?? 1. ????????? 2. ?????? v dd 5 5 2 5 . 5 5 v ????? ? 3. ?????? ? ???????? 78k0 ? ?? ?? 01 (u18274j) 78k0 ? ?? 01 3.10 ? ( ? ) (zud-cd-09-0122) r01uh0312cj0110 rev.1.10 344 2013.11.29 pd79f7023, 79f7024 ?? ?? ?? ?? 20.1 ??? ? pd79f7023 79f7024 ?? 0080h 0081h 0084h ??????????? ??????????????? ???? 0080h 0081h 0084h 1080h 1081h 1084h ??? 0080h 0081h 0084h 1080h 1081h 1084h ??? (1) 0080h/1080h { ? ? ?? ? ??? { ??? { ?? ? ? ? { ???? ? 0080h 1080h ???? 0080h 1080h ?? (2) 0081h/1081h { lvi ???? ? lvi ????(lvistart = 1) ??C???? 2.7v ??????? 2.7v ?? ?? ?????? 2.7v ??? 0.5 v/ms ( ?) ? lvi ? ? lvi ?????(lvistart = 0) ??C???? 1.59 v ??????? 1.59 v ? ??? ? lvistart ???????????? 0081h 1081 ???? 0080h 1080h ?? r01uh0312cj0110 rev.1.10 345 2013.11.29 pd79f7023, 79f7024 ?? ?? (3) 0082h/1082h ? 01h ? 0082h 1082h ???? 0082h 1082h ?? (4) 0083h/1083h { on-chip ?? ? ? on-chip ?? ? ? on-chip ?? { ? stop ????? uart0 ? ? ? ?? ? 0083h 1083h ???? 0083h 1083h ?? (5) 0084h/1084h { on-chip ? ? ? on-chip ? ? on-chip ?on-chip ?? id ???? ? on-chip ?on-chip ?? id ???? ? 0084h 1084h ???? 0084h 1084h ?? 20.2 ???? ????? r01uh0312cj0110 rev.1.10 346 2013.11.29 pd79f7023, 79f7024 ?? ?? ? 20-1. ???? (1/3) ? 0080h/1080h ? 7 6 5 4 3 2 1 0 0 window1 window0 wdton wdcs2 wdcs1 wdcs0 lsrosc window1 window0 ???? 0 0 25% 0 1 50% 1 0 75% 1 1 100% wdton ?? / ??? 0 ? ( ?? ) ??? 1 ( ? ) ?? wdcs2 wdcs1 wdcs0 ??? 0 0 0 2 10 /f il (4.27 ms) 0 0 1 2 11 /f il (8.53 ms) 0 1 0 2 12 /f il (17.07 ms) 0 1 1 2 13 /f il (34.13 ms) 1 0 0 2 14 /f il (68.27 ms) 1 0 1 2 15 /f il (136.53 ms) 1 1 0 2 16 /f il (273.07 ms) 1 1 1 2 17 /f il (546.13 ms) lsrosc ? 0 ?? (rcm ?? 1 (lsrstop) ?1 ???) 1 ??? ( ? lsrstop ?? 1 ???) ? 0080h 1080h ???? 0080h 1080h ?? ? 1. ? wdcs2 = wdcs1 = wdcs0 = 0 window1 = window0 = 0 2. ?????????????? ??? 3. lsrosc = 0( ?? ) ???? (rcm) ? 0 (lsrstop) ? ? halt stop ??????? 8 ? h1 ???? halt/stop ?????? 8 ? h1 4. ? 7 ? ? 1. f il : ??? 2. ( ): f il = 240 khz ( ?) r01uh0312cj0110 rev.1.10 347 2013.11.29 pd79f7023, 79f7024 ?? ?? ? 20-1. ???? (2/3) ? 0081h/1081h ? 1, 2 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 lvistart lvistart lvi ??? 0 ??lvi ?? off(lvi ??? 1 ??lvi ?? on(lvi ? ? 1. lvistart ????????? 0081h 1081 ???? 0080h 1080h ?? 2. ? lvi ??? 0081h ??? ? 7 1 ? ? 0082h/1082h ? 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 1 ? 0082h 1082h ??? 0083h ? 1 ? ? 01h ? 0083h/1083h ? 7 6 5 4 3 2 1 0 0 0 0 ocdckstp 1 1 1 ocdonb ocdckst p on-chip ??? stop ?? uart0 ??? 0 ?? stop ????? uart0 ??? cpu ?? 1 ???????? uart0 ??? ocdonb on-chip ?? 0 ? on-chip ?? 1 ? on-chip ?? ? 0083h 1083h ???? 0083h 1083h ?? ? ? 7 5 ? 0 ? 3 1 ? 1 r01uh0312cj0110 rev.1.10 348 2013.11.29 pd79f7023, 79f7024 ?? ?? ? 20-1. ???? (3/3) ? 0084h/1084h ? 7 6 5 4 3 2 1 0 0 0 0 0 0 0 ocden1 ocden0 ocden1 ocden0 on-chip ? 0 0 ? 0 1 ? 1 0 on-chip ?? id ????? 1 1 on-chip ?? id ???? ? 0084h 1084h ???? 0084h 1084h ?? ? ? 7 2 ? ? on-chip ?? id ??? on-chip ? r01uh0312cj0110 rev.1.10 349 2013.11.29 pd79f7023, 79f7024 ?? ?? ???? opt cseg at 0080h ? : db 30h ????? ?????:50% ???:2 10 /f il ????? db 00h ?? lvi ??? db 01h ??? 4 mhz( ?) db 1eh ? toolc0/x1, toold0/x2 db 02h on-chip ?? id ????? ? ??????? ? r01uh0312cj0110 rev.1.10 350 2013.11.29 pd79f7023, 79f7024 ??? ??? pd79f7023 79f7024 ???????? 21.1 ?? ??(ims)?? 8 ?? ims ???ims ? cfh ? ?? rom ?????? 21-1 ????? ? 21-1. ? (ims) ?? ? fff0h cfh r/w 7 6 5 4 3 2 1 0 ims ram2 ram1 ram0 0 rom3 rom2 rom1 rom0 ram2 ram1 ram0 ? ram ? 0 0 0 768 ? 0 1 0 512 ? 1 1 0 ?? ? rom3 rom2 rom1 rom0 ? rom ? 0 0 1 0 8 kb 0 1 0 0 16 kb 1 1 1 1 ( ?? ) ? r01uh0312cj0110 rev.1.10 351 2013.11.29 pd79f7023, 79f7024 ??? 21-1. ?? (ims) ?? ? ims pd79f7023 42h pd79f7024 04h 21.2 ?? ????? (1) ? ????? pd79f7023 79f7024 ??????? ????? (2) ? pd79f7023 79f7024 ?????????? (fa ?)? ? fa ?? ? (naito densei machida mfg. co., ltd.) ?? r01uh0312cj0110 rev.1.10 352 2013.11.29 pd79f7023, 79f7024 ??? 21.3 ? pd79f7023 79f7024 ??? ? 21-2. ? rs-232-c usb flashpro5 qb-mini2 reset clk si so data note gnd /reset toold0 toolc0 host machine dedicated flash memory programmer pd79f7023, 79f7024 v dd v ss v dd ? qb-mini2 ???? ? pd79f7023 79f7024 ??? toold0 ???? uart ?? ???(fa ?) 21-2. ? pd79f7023, 79f7024 ? ? i/o ? clk ? pd79f7023 79f7024 ? toolc0/ si ? so ? data ? i/o ???? toold0 /reset ? reset v dd i/o v dd ? / ? v dd gnd ? ? v ss ? qb-mini2 r01uh0312cj0110 rev.1.10 353 2013.11.29 pd79f7023, 79f7024 ??? 21.4 ???????????? ? ??????????????? ???? 21.4.1 tool ?????? 21-3. ????? toolc0 ??? (10 k ? ) v ss toold0 ??? (3 k ? 10 k ? ) v dd ?????????? (1) ??? ?? tool ????????? ???? ? 21-3. ??? (tool ? tool pin signal collision dedicated flash memory programmer connection pin other device input pin or output pin in the flash memory programming mode, the signal of the other device collides with the signal of the dedicated flash programmer. therefore, isolate the signal of the other device. pd79f7023, 79f7024 r01uh0312cj0110 rev.1.10 354 2013.11.29 pd79f7023, 79f7024 ??? 21.4.2 reset ????? reset ??????????? ????? ??????????????? ???? 2013.11.29 ? 21-4. ??? (reset ? reset dedicated flash memory programmer connection signal reset signal generator signal collision output pin in the flash memory programming mode, the signal output by the reset signal generator collides with the signal output by the dedicated flash memory programmer. therefore, isolate the signal of the reset signal generator. pd79f7023, 79f7024 21.4.3 ? ???????????????? ????? v dd v ss 21.4.4 regc ????(0.47 1 f) regc ? gnd ??????? ? stop ????? 0.47 f ????????? 21.4.5 ? ????? x1 x2 ? ????? (f ih ) 21.4.6 ? ??? vdd ? vdd vss ? gnd ?e????? ?????e???? v dd v ss v dd gnd ?(av ref , v ss ) ????? r01uh0312cj0110 rev.1.10 355 pd79f7023, 79f7024 ??? 21.4.7 ? / ??? ?????????????? ??????????????? ???? ?????? halt ???? x1(toolc0) x2(toold0) ????????????? ?? ? x1 x2 ?????????????? ? ???? / ???????? ???? ? ? ???????????? 21-5 ? 21-4 ? 21-5. ???? x1 (toolc0) v ss test pad x2 (toold0) 21-4. ??????? ?? ??? ?? ?? ??? ? / ?? ?? ? r01uh0312cj0110 rev.1.10 356 2013.11.29 pd79f7023, 79f7024 ??? 21.5 ? 21.5.1 ?? ? 21-6. start manipulate flash memory end? yes no end flash memory programming mode is set 21.5.2 ?? ???? pd79f7023 79f7024 ???? ??????? ??????? 21.5.3 ? pd79f7023 79f7024 ????? pd79f7023 79f7024 ? ?? pd79f7023 79f7024 ??? ? 21-7. ? command response pd79f7023, 79f7024 dedicated flash memory programmer flashpro5 qb-mini2 pd79f7023 79f7024 ??? pd79f7023 79f7024 ?? r01uh0312cj0110 rev.1.10 357 2013.11.29 pd79f7023, 79f7024 ??? 21-5. verify ????? chip erase block erase ? ?? block blank check ???? programming ? silicon signature ? pd79f7023 79f7024 ? ( @?? ) version get ? pd79f7023 79f7024 ?? ?? checksum ??? ? security set e?? reset ?????? baud rate set uart ??? pd79f7023 79f7024 ?? pd79f7023 79f7024 ? ? 21-6. ? ? ack ?/ nak ? / r01uh0312cj0110 rev.1.10 358 2013.11.29 pd79f7023, 79f7024 ??? 21.6 ? pd79f7023 79f7024 ?????????? ??e???2????? ? ?? / ???? ( ?) ???(?) ? ??((?)?) ? ?????????? ????? ? ? / ?????????? ? ? / ??????????? ? ?? 0 ?? 0(0000h 0fffh) ??(?) ?????? / / / ? 0 ? / ???? ????? ?????? 21-7 ? pd79f7023 79f7024 ????? r01uh0312cj0110 rev.1.10 359 2013.11.29 pd79f7023, 79f7024 ??? 21-7. ???? (1) / ?? ? ? ? ?? ? ? ? ? ? ? ?? ?? 0 ? ?? 0 ?? 0 ? ???? (?)???? (2) ?? ? ? ?? ? ? ? ? ?? 0 ?? 0 ?? 0 21-8 ?????? 21-8. ?????? (1) / ? ? ? ?? ?? ? ? ? ?? ?? 0 ?? gui ? (2) ? ? ? ?? ?? ? ? ? ?? 0 ?? / ???? ??? r01uh0312cj0110 rev.1.10 360 2013.11.29 pd79f7023, 79f7024 ??? 21.7 ??? pd79f7023 79f7024 ??????????? pd79f7023 79f7024 ???? ?????????? ei ??? ????????????????????? ? 1. ?????????? di ?? ie ?? 0 ?????? ei ?? ie ??1? ???? 0 ? ??? 2. ????????? 3. ?????? v dd 2.5v ??? ??? 4. ????? ? ????????78k0 ? ?? ?? 01 (u18274j) ?? 78k0 ? ?? 01 3.10 ? ( ? ) (zud-cd-09-0122) ? r01uh0312cj0110 rev.1.10 361 2013.11.29 pd79f7023, 79f7024 ??? 21.7.1 ????? ?????(fpctl)??? 1 8 ?? fpctl ???fpctl ? 00h ? 21-8. ????? (fpctl) ?? ? ff2bh 00h r/w 7 6 5 4 3 2 1 <0> fpctl 0 0 0 0 0 0 0 flmdpup ? flmdpup ? ??? 0 ?? 1 ??? ? flmdpup ??? 0 ????? 1 ? ?? ??????????? 21.7.2 ? ( ? ) ????? r01uh0312cj0110 rev.1.10 362 2013.11.29 pd79f7023, 79f7024 ??? ? 21-9. ??? start of self programming flashstart normal completion? no setting operating environment flashenv checkflmd flashblockblankcheck yes flashblockerase flashwordwrite flashblockverify flashend end of self programming normal completion? no yes normal completion? normal completion error no yes flashblockerase flashwordwrite flashblockverify setting flmdpup to 1 clearing flmdpup to 0 ? ????????78k0 ? ?? ?? 01 (u18274e)? ?78k0 ? ?? 01 ver. 3.10 ? (?? ) (zud-cd-09-0122)? r01uh0312cj0110 rev.1.10 363 2013.11.29 pd79f7023, 79f7024 ??? 21.7.3 ??????????????? ?? ?? 0 ? ??????? 1 ? 1 ? pd79f7023 79f7024 ????? 1 ? 2 ? ? ? 1 ?????? 0 ?? ???? 1 ? ??????? ? 4kb ????? 0 ? 1 ? ? 4kb rom ???? ? 21-10. boot program (boot cluster 0) new boot program (boot cluster 1) user program self-programming to boot cluster 1 self-programming to boot cluster 0 execution of boot swap by firmware user program boot program (boot cluster 0) user program new user program (boot cluster 0) new boot program (boot cluster 1) user program new boot program (boot cluster 1) boot program (boot cluster 0) user program xxxxh 2000h 0000h 1000h boot boot boot boot ??? ? 0: ? ? 1: r01uh0312cj0110 rev.1.10 364 2013.11.29 pd79f7023, 79f7024 ??? ? 21-11. ?? 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 boot cluster 1 booted by boot cluster 0 block number erasing block 4 boot cluster 0 program 1000h 0000h boot program program program program boot program boot program boot program program program program boot program boot program boot program boot program boot program boot program boot program boot program program program program boot program boot program boot program boot program boot program boot program boot program boot program erasing block 5 erasing block 6 erasing block 7 boot program boot program boot program boot program boot program boot program boot program boot program boot program boot program boot program boot program boot program boot program booted by boot cluster 1 1000h 0000h erasing block 6 erasing block 7 erasing block 4 erasing block 5 boot swap writing blocks 4 to 7 writing blocks 4 to 7 1000h 0000h new boot program new program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new boot program new program new program new program r01uh0312cj0110 rev.1.10 365 2013.11.29 pd79f7023, 79f7024 ?? on-chip ? ?? on-chip ? 22.1 qb-mini2 pd79f7023, 79f7024 pd79f7023, 79f7024 ? on-chip ? (qb-mini2) ? v dd , reset, toolc0/x1, toold0/x2 v ss ?? ? 1. pd79f7023, 79f7024 / ? on-chip ??? on-chip ??? ????????????? ??? on-chip ?????? 2. on-chip ? stop ???????? on-chip ? r01uh0312cj0110 rev.1.10 366 2013.11.29 pd79f7023, 79f7024 ?? on-chip ? ? 22-1. qb-mini2 pd79f7023, 79f7024 ? (1/2) (1) ? toolc0 toold0 ? ( ? x1 exclk ????? ) 1 2 3 4 5 6 7 8 9 gnd reset_out r.f.u. r.f.u. r.f.u. toold0(x2) note 3 11 13 15 r.f.u. data r.f.u. 8 toolc0(x1) note 3 10 k note 5 rxd txd 8 10 r.f.u. reset note 1 12 14 16 flmd1 flmd0 reset v dd v dd v dd 1 k note 5 10 k note 4 gnd v dd v dd 3 k to 10 k target connector target device reset connector note 5 reset_in note 5 clk note 2 ? 1. ??? on-chip ???? 2. on-chip ?? 78k0-ocd ??? qb-mini2 ?? 4/8mhz ??? ???? ????? 3. on-chip ?? on-chip ???? ??? qb-mini2 ???? 4. ??( qb-mini2) ?(?????? 5. ??? n-ch ?s 100 ?? r01uh0312cj0110 rev.1.10 367 2013.11.29 pd79f7023, 79f7024 ?? on-chip ? ? 22-1. qb-mini2 pd79f7023, 79f7024 ? (2/2) (2) ? toolc0 toold0 ? ( ? x1/x2 ??? ) 1 2 3 4 5 6 7 8 9 gnd reset_out r.f.u. r.f.u. r.f.u. toold0(x2) n ote 3 11 13 15 r.f.u. data reset_in note 4 r.f.u. 8 toolc0(x1) note 3 10 k note 4 rxd txd 8 10 r.f.u. reset n ote 1 12 14 16 flmd1 flmd0 reset v dd v dd v dd 1 k note 4 note 5 gnd v dd v dd target connector target device reset connector n o t e 4 clk note 2 ? 1. ??? on-chip ???? 2. on-chip ?? 78k0-ocd ??? qb-mini2 ?? 4/8mhz ??? ???? flash ????? 3. on-chip ?? on-chip ????? ??? qb-mini2 ???? 4. ??? n-ch ?s 100 ??? qb-mini2 ? on-chip ??? (u18371j) 4.1.3 ? 5. on-chip ??????? ?( qb-mini2) ?????????????? ???? ????? qb-mini2 ?? ? ??? (toold0 toolc0) ? qb-mini2 ?? 30mm ?? gnd r01uh0312cj0110 rev.1.10 368 2013.11.29 pd79f7023, 79f7024 ?? on-chip ? 22.2 on-chip ?? id ? pd79f7023 79f7024 , ?????? 0084h ? on-chip ? ( ?? ?? ) 0085h 008eh ?? on-chip ?? id ??? 0084h 0085h 008eh 1083h ? 1085h 108eh ?? ? 1084h 1085h 108eh ?? ? on-chip ?? id ? qb-mini2 ?? on-chip ? ?? (u18371j) 22-1. on-chip ?? id ? on-chip ?? id 0085h 008eh 10 ?? id 1085h 108eh r01uh0312cj0110 rev.1.10 369 2013.11.29 pd79f7023, 79f7024 ?? on-chip ? 22.3 ?? ??????qb-mini2 ?? 22-2 ?????? (?) ?? ???????? ???? ?? qb-mini2 ?? on-chip ? ?? (u18371j) ? 22-2. qb-mini2 ??? 128 bytes 10 bytes 2 bytes 256 bytes 1 byte 2 bytes security id area pseudo rrm area debug monitor area option byte area software break area 03h 02h internal rom space 9 bytes (max.) internal ram space 00h stack area for debugging : area that must be reserved 290h 28fh debug monitor area 7fh 7eh 84h 8eh 85h 8fh 18fh 18eh r01uh0312cj0110 rev.1.10 370 2013.11.29 pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 371 2013.11.29 ?? ?? ??? pd79f7023 79f7024 ??????? 78k/0 ? ? ?? (u12326e) 23.1 ? 23.1.1 ?? ?????Z , ?? " " ???? ????? # ! $ [ ] ??? ?????? ? #: ? ? !: ??? ? $: ??? ? [ ]: ??? ??????? # ! $ [ ] ??? r rp ? (x, a, c ) ( ?? r0, r1, r2 ) ? 23-1. ?? ? ? r rp sfr sfrp x (r0), a (r1), c (r2), b (r3), e (r4), d (r5), l (r6), h (r7) ax (rp0), bc (rp1), de (rp2), hl (rp3) ??? ? ??? ( 16 ???? ) ? saddr saddrp fe20h ff1fh fe20h ff1fh ( ?? ) addr16 addr11 addr5 0000h ffffh ( 16 ??? ) 0800h 0fffh 0040h 007fh ( ?? ) ? 16 8 3 rbn rb0 rb3 ? ??? ffd0h ffdfh ? ???? 3-6 ??? pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 372 2013.11.29 23.1.2 a: a ? 8 ? x: x ? b: b ? c: c ? d: d ? e: e ? h: h ? l: l ? ax: ax ?? 16 ? bc: bc ? de: de ? hl: hl ? pc: sp: ?? psw: ?? cy: ?? ac: ?? z: ? rbs: ??? ie: ? ( ): ????? x h , x l : 16 ?? 8 ? 8 : ?? : ?? : ?? ?? : ? addr16: 16 jdisp8: ? 8 ?? 23.1.3 ? (blank): ? 0: 1: 1 : ? / r: ??? pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 373 2013.11.29 23.2 ? ? ? ? ? 1 ? 2 zaccy r, # ? 2 4 ? r ? saddr, # ? 3 6 7 (saddr) ? sfr, # ? 3 ? 7 sfr ? a, r ? 3 1 2 ? a r r, a ? 3 1 2 ? r a a, saddr 2 4 5 a (saddr) saddr, a 2 4 5 (saddr) a a, sfr 2 ? 5 a sfr sfr, a 2 ? 5 sfr a a, !addr16 3 8 9 a (addr16) !addr16, a 3 8 9 (addr16) a psw, # ? 3 ? 7 psw ? a, psw 2 ? 5 a psw psw, a 2 ? 5 psw a a, [de] 1 4 5 a (de) [de], a 1 4 5 (de) a a, [hl] 1 4 5 a (hl) [hl], a 1 4 5 (hl) a a, [hl + ? ] 2 8 9 a (hl + ? ) [hl + ? ], a 2 8 9 (hl + ? ) a a, [hl + b] 1 6 7 a (hl + b) [hl + b], a 1 6 7 (hl + b) a a, [hl + c] 1 6 7 a (hl + c) mov [hl + c], a 1 6 7 (hl + c) a a, r ? 3 1 2 ? a ? r a, saddr 2 4 6 a ? (saddr) a, sfr 2 ? 6 a ? (sfr) a, !addr16 3 8 10 a ? (addr16) a, [de] 1 4 6 a ? (de) a, [hl] 1 4 6 a ? (hl) a, [hl + ? ] 2 8 10 a ? (hl + ? ) a, [hl + b] 2 8 10 a ? (hl + b) 8 ? xch a, [hl + c] 2 8 10 a ? (hl + c) ? 1. ? ram ????? 2. ? ram ? 3. r = a ? 1. ????????? (pcc) ? cpu ? (f cpu ) ?? 2. ?? rom pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 374 2013.11.29 ? ? ? ? ? 1 ? 2 zaccy rp, # 3 6 ? rp saddrp, # 4 8 10 (saddrp) sfrp, # 4 ? 10 sfrp ax, saddrp 2 6 8 ax (saddrp) saddrp, ax 2 6 8 (saddrp) ax ax, sfrp 2 ? 8 ax sfrp sfrp, ax 2 ? 8 sfrp ax ax, rp ? 3 1 4 ? ax rp rp, ax ? 3 1 4 ? rp ax ax, !addr16 3 10 12 ax (addr16) movw !addr16, ax 3 10 12 (addr16) ax 16 xchw ax, rp ? 3 1 4 ? ax ? rp a, # ? 2 4 ? a, cy a + ? saddr, # ? 3 6 8 (saddr), cy (saddr) + ? a, r ? 4 2 4 ? a, cy a + r r, a 2 4 ? r, cy r + a a, saddr 2 4 5 a, cy a + (saddr) a, !addr16 3 8 9 a, cy a + (addr16) a, [hl] 1 4 5 a, cy a + (hl) a, [hl + ? ] 2 8 9 a, cy a + (hl + ? ) a, [hl + b] 2 8 9 a, cy a + (hl + b) add a, [hl + c] 2 8 9 a, cy a + (hl + c) a, # ? 2 4 ? a, cy a + ? + cy saddr, # ? 3 6 8 (saddr), cy (saddr) + ? + cy a, r ? 4 2 4 ? a, cy a + r + cy r, a 2 4 ? r, cy r + a + cy a, saddr 2 4 5 a, cy a + (saddr) + cy a, !addr16 3 8 9 a, cy a + (addr16) + c a, [hl] 1 4 5 a, cy a + (hl) + cy a, [hl + ? ] 2 8 9 a, cy a + (hl + ? ) + cy a, [hl + b] 2 8 9 a, cy a + (hl + b) + cy 8 addc a, [hl + c] 2 8 9 a, cy a + (hl + c) + cy ? 1. ? ram ????? 2. ? ram ? 3. rp = bc, de hl ? 4. r = a ? 1. ????????? (pcc) ? cpu ? (f cpu ) ?? 2. ?? rom pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 375 2013.11.29 ? ? ? ? ? 1 ? 2 zaccy a, # ? 2 4 ? a, cy a ? ? saddr, # ? 3 6 8 (saddr), cy (saddr) ? ? a, r ? 3 2 4 ? a, cy a ? r r, a 2 4 ? r, cy r ? a a, saddr 2 4 5 a, cy a ? (saddr) a, !addr16 3 8 9 a, cy a ? (addr16) a, [hl] 1 4 5 a, cy a ? (hl) a, [hl + ? ] 2 8 9 a, cy a ? (hl + ? ) a, [hl + b] 2 8 9 a, cy a ? (hl + b) sub a, [hl + c] 2 8 9 a, cy a ? (hl + c) a, # ? 2 4 ? a, cy a ? ? ? cy saddr, # ? 3 6 8 (saddr), cy (saddr) ? ? ? cy a, r ? 3 2 4 ? a, cy a ? r ? cy r, a 2 4 ? r, cy r ? a ? cy a, saddr 2 4 5 a, cy a ? (saddr) ? cy a, !addr16 3 8 9 a, cy a ? (addr16) ? cy a, [hl] 1 4 5 a, cy a ? (hl) ? cy a, [hl + ? ] 2 8 9 a, cy a ? (hl + ? ) ? cy a, [hl + b] 2 8 9 a, cy a ? (hl + b) ? cy subc a, [hl + c] 2 8 9 a, cy a ? (hl + c) ? cy a, # ? 2 4 ? a a ? saddr, # ? 3 6 8 (saddr) (saddr) ? a, r ? 3 2 4 ? a a r r, a 2 4 ? r r a a, saddr 2 4 5 a a (saddr) a, !addr16 3 8 9 a a (addr16) a, [hl] 1 4 5 a a (hl) a, [hl + ? ] 2 8 9 a a (hl + ? ) a, [hl + b] 2 8 9 a a (hl + b) 8 and a, [hl + c] 2 8 9 a a (hl + c) ? 1. ? ram ????? 2. ? ram ? 3. r = a ? 1. ????????? (pcc) ? cpu ? (f cpu ) ?? 2. ?? rom pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 376 2013.11.29 ? ? ? ? ? 1 ? 2 zaccy a, # ? 2 4 ? a a ? saddr, # ? 3 6 8 (saddr) (saddr) ? a, r ? 3 2 4 ? a a r r, a 2 4 ? r r a a, saddr 2 4 5 a a (saddr) a, !addr16 3 8 9 a a (addr16) a, [hl] 1 4 5 a a (hl) a, [hl + ? ] 2 8 9 a a (hl + ? ) a, [hl + b] 2 8 9 a a (hl + b) or a, [hl + c] 2 8 9 a a (hl + c) a, # ? 2 4 ? a a ? saddr, # ? 3 6 8 (saddr) (saddr) ? a, r ? 3 2 4 ? a a r r, a 2 4 ? r r a a, saddr 2 4 5 a a (saddr) a, !addr16 3 8 9 a a (addr16) a, [hl] 1 4 5 a a (hl) a, [hl + ? ] 2 8 9 a a (hl + ? ) a, [hl + b] 2 8 9 a a (hl + b) xor a, [hl + c] 2 8 9 a a (hl + c) a, # ? 2 4 ? a ? ? saddr, # ? 3 6 8 (saddr) ? ? a, r ? 3 2 4 ? a ? r r, a 2 4 ? r ? a a, saddr 2 4 5 a ? (saddr) a, !addr16 3 8 9 a ? (addr16) a, [hl] 1 4 5 a ? (hl) a, [hl + ? ] 2 8 9 a ? (hl + ? ) a, [hl + b] 2 8 9 a ? (hl + b) 8 cmp a, [hl + c] 2 8 9 a ? (hl + c) ? 1. ? ram ????? 2. ? ram ? 3. r = a ? 1. ????????? (pcc) ? cpu ? (f cpu ) ?? 2. ?? rom pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 377 2013.11.29 ? ? ? ? ? 1 ? 2 zaccy addw ax, # 3 6 ? ax, cy ax + subw ax, # 3 6 ? ax, cy ax ? 16 cmpw ax, # 3 6 ? ax ? mulu x 2 16 ? ax a x / divuw c 2 25 ? ax ( ), c ( ) ax c r 1 2 ? r r + 1 inc saddr 2 4 6 (saddr) (saddr) + 1 r 1 2 ? r r ? 1 dec saddr 2 4 6 (saddr) (saddr) ? 1 incw rp 1 4 ? rp rp + 1 / ? decw rp 1 4 ? rp rp ? 1 ror a, 1 1 2 ? (cy, a 7 a 0 , a m ? 1 a m ) 1 rol a, 1 1 2 ? (cy, a 0 a 7 , a m + 1 a m ) 1 rorc a, 1 1 2 ? (cy a 0 , a 7 cy, a m ? 1 a m ) 1 rolc a, 1 1 2 ? (cy a 7 , a 0 cy, a m + 1 a m ) 1 ror4 [hl] 2 10 12 a 3 ? 0 (hl) 3 ? 0 , (hl) 7 ? 4 a 3 ? 0 , (hl) 3 ? 0 (hl) 7 ? 4 ? rol4 [hl] 2 10 12 a 3 ? 0 (hl) 7 ? 4 , (hl) 3 ? 0 a 3 ? 0 , (hl) 7 ? 4 (hl) 3 ? 0 adjba 2 4 ? ??? bcd adjbs 2 4 ? ?? cy, saddr. 3 6 7 cy (saddr. ) cy, sfr. 3 ? 7 cy sfr. cy, a. 2 4 ? cy a. cy, psw. 3 ? 7 cy psw. cy, [hl]. 2 6 7 cy (hl). saddr. , cy 3 6 8 (saddr. ) cy sfr. , cy 3 ? 8 sfr. cy a. , cy 2 4 ? a. cy psw. , cy 3 ? 8 psw. cy mov1 [hl]. , cy 2 6 8 (hl). cy ? 1. ? ram ????? 2. ? ram ? ? 1. ????????? (pcc) ? cpu ? (f cpu ) ?? 2. ?? rom pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 378 2013.11.29 ? ? ? ? ? 1 ? 2 zaccy cy, saddr. 3 6 7 cy cy (saddr. ) cy, sfr. 3 ? 7 cy cy sfr. cy, a. 2 4 ? cy cy a. cy, psw. 3 ? 7 cy cy psw. and1 cy, [hl]. 2 6 7 cy cy (hl). cy, saddr. 3 6 7 cy cy (saddr. ) cy, sfr. 3 ? 7 cy cy sfr. cy, a. 2 4 ? cy cy a. cy, psw. 3 ? 7 cy cy psw. or1 cy, [hl]. 2 6 7 cy cy (hl). cy, saddr. 3 6 7 cy cy (saddr. ) cy, sfr. 3 ? 7 cy cy sfr. cy, a. 2 4 ? cy cy a. cy, psw. 3 ? 7 cy cy psw. xor1 cy, [hl]. 2 6 7 cy cy (hl). saddr. 2 4 6 (saddr. ) 1 sfr. 3 ? 8 sfr. 1 a. 2 4 ? a. 1 psw. 2 ? 6 psw. 1 set1 [hl]. 2 6 8 (hl). 1 saddr. 2 4 6 (saddr. ) 0 sfr. 3 ? 8 sfr. 0 a. 2 4 ? a. 0 psw. 2 ? 6 psw. 0 clr1 [hl]. 2 6 8 (hl). 0 set1 cy 1 2 ? cy 1 1 clr1 cy 1 2 ? cy 0 0 not1 cy 1 2 ? cy cy ? 1. ? ram ????? 2. ? ram ? ? 1. ????????? (pcc) ? cpu ? (f cpu ) ?? 2. ?? rom pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 379 2013.11.29 ? ? ? ? ? 1 ? 2 zaccy call !addr16 3 7 ? (sp ? 1) (pc + 3) h , (sp ? 2) (pc + 3) l , pc addr16, sp sp ? 2 callf !addr11 2 5 ? (sp ? 1) (pc + 2) h , (sp ? 2) (pc + 2) l , pc 15 ? 11 00001, pc 10 ? 0 addr11, sp sp ? 2 callt [addr5] 1 6 ? (sp ? 1) (pc + 1) h , (sp ? 2) (pc + 1) l , pc h (addr5 + 1), pc l (addr5), sp sp ? 2 brk 1 6 ? (sp ? 1) psw, (sp ? 2) (pc + 1) h , (sp ? 3) (pc + 1) l , pc h (003fh), pc l (003eh), sp sp ? 3, ie 0 ret 1 6 ? pc h (sp + 1), pc l (sp), sp sp + 2 reti 1 6 ? pc h (sp + 1), pc l (sp), psw (sp + 2), sp sp + 3 rrr / retb 1 6 ? pc h (sp + 1), pc l (sp), psw (sp + 2), sp sp + 3 rrr psw 1 2 ? (sp ? 1) psw, sp sp ? 1 push rp 1 4 ? (sp ? 1) rp h , (sp ? 2) rp l , sp sp ? 2 psw 1 2 ? psw (sp), sp sp + 1 r r r pop rp 1 4 ? rp h (sp + 1), rp l (sp), sp sp + 2 sp, # 4 ? 10 sp sp, ax 2 ? 8 sp ax ? movw ax, sp 2 ? 8 ax sp !addr16 3 6 ? pc addr16 $addr16 2 6 ? pc pc + 2 + jdisp8 ? br ax 2 8 ? pch a, pc l x bc $addr16 2 6 ? pc pc + 2 + jdisp8 if cy = 1 bnc $addr16 2 6 ? pc pc + 2 + jdisp8 if cy = 0 bz $addr16 2 6 ? pc pc + 2 + jdisp8 if z = 1 ? bnz $addr16 2 6 ? pc pc + 2 + jdisp8 if z = 0 ? 1. ? ram ????? 2. ? ram ? ? 1. ????????? (pcc) ? cpu ? (f cpu ) ?? 2. ?? rom pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 380 2013.11.29 ? ? ? ? ? 1 ? 2 zaccy saddr. , $addr16 3 8 9 pc pc + 3 + jdisp8 if (saddr. ) = 1 sfr. , $addr16 4 ? 11 pc pc + 4 + jdisp8 if sfr. = 1 a. , $addr16 3 8 ? pc pc + 3 + jdisp8 if a. = 1 psw. , $addr16 3 ? 9 pc pc + 3 + jdisp8 if psw. = 1 bt [hl]. , $addr16 3 10 11 pc pc + 3 + jdisp8 if (hl). = 1 saddr. , $addr16 4 10 11 pc pc + 4 + jdisp8 if (saddr. ) = 0 sfr. , $addr16 4 ? 11 pc pc + 4 + jdisp8 if sfr. = 0 a. , $addr16 3 8 ? pc pc + 3 + jdisp8 if a. = 0 psw. , $addr16 4 ? 11 pc pc + 4 + jdisp8 if psw. = 0 bf [hl]. , $addr16 3 10 11 pc pc + 3 + jdisp8 if (hl). = 0 saddr. , $addr16 4 10 12 pc pc + 4 + jdisp8 if (saddr. ) = 1 then reset (saddr. ) sfr. , $addr16 4 ? 12 pc pc + 4 + jdisp8 if sfr. = 1 then reset sfr. a. , $addr16 3 8 ? pc pc + 3 + jdisp8 if a. = 1 then reset a. psw. , $addr16 4 ? 12 pc pc + 4 + jdisp8 if psw. = 1 then reset psw. btclr [hl]. , $addr16 3 10 12 pc pc + 3 + jdisp8 if (hl). = 1 then reset (hl). b, $addr16 2 6 ? b b ? 1, ? pc pc + 2 + jdisp8 if b 0 c, $addr16 2 6 ? c c ? 1, ? pc pc + 2 + jdisp8 if c 0 ? dbnz saddr, $addr16 3 8 10 (saddr) (saddr) ? 1, ? pc pc + 3 + jdisp8 if (saddr) 0 sel rbn 2 4 ? rbs1, 0 n nop 1 2 ? ? ei 2 ? 6 ie 1 ( ) di 2 ? 6 ie 0 ( ? ) halt 2 6 ? halt ?? cpu stop 2 6 ? stop ?? ? 1. ? ram ????? 2. ? ram ? ? 1. ????????? (pcc) ? cpu ? (f cpu ) ?? 2. ?? rom pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 381 2013.11.29 23.3 ??? (1) 8 ? mov, xch, add, addc, sub, subc, and, or, xor, cm p, mulu, divuw, inc, dec, ror, rol, rorc, rolc, ror4, rol4, push, pop, dbnz ? ? # ? a r ? sfr saddr !addr16 psw [de] [hl] [hl + ? ] [hl + b] [hl + c] $addr16 1 a add addc sub subc and or xor cmp mov xch add addc sub subc and or xor cmp mov xch mov xch add addc sub subc and or xor cmp mov xch add addc sub subc and or xor cmp mov mov xch mov xch add addc sub subc and or xor cmp mov xch add addc sub subc and or xor cmp ror rol rorc rolc r mov mov add addc sub subc and or xor cmp inc dec b, c dbnz sfr mov mov saddr mov add addc sub subc and or xor cmp mov dbnz inc dec !addr16 mov psw mov mov push pop [de] mov [hl] mov ror4 rol4 [hl + ? ] [hl + b] [hl + c] mov x mulu c divuw ? r = a pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 382 2013.11.29 (2) 16 ? movw, xchw, addw, subw, cmpw, push, pop, incw, decw ? ? # ax rp ? sfrp saddrp !addr16 sp ax addw subw cmpw movw xchw movw movw movw movw rp movw movw ? incw decw push pop sfrp movw movw saddrp movw movw !addr16 movw sp movw movw ? rp = bc, de, hl ? (3) ? mov1, and1, or1, xor1, set1, clr1, not1, bt, bf, btclr ? ? a. sfr. saddr. psw. [hl]. cy $addr16 a. mov1 bt bf btclr set1 clr1 sfr. mov1 bt bf btclr set1 clr1 saddr. mov1 bt bf btclr set1 clr1 psw. mov1 bt bf btclr set1 clr1 [hl]. mov1 bt bf btclr set1 clr1 cy mov1 and1 or1 xor1 mov1 and1 or1 xor1 mov1 and1 or1 xor1 mov1 and1 or1 xor1 mov1 and1 or1 xor1 set1 clr1 not1 pd79f7023, 79f7024 ?? ?? r01uh0312cj0110 rev.1.10 383 2013.11.29 (4) ? / ?? call, callf, callt, br, bc, bnc, bz, bnz, bt, bf, btclr, dbnz ? ? ax !addr16 !addr11 [addr5] $addr16 ? br call br callf callt br bc bnc bz bnz ? bt bf btclr dbnz (5) ? adjba, adjbs, brk, ret, reti, retb, sel, nop, ei, di, halt, stop pd79f7023, 79f7024 ?? ?? ? pd79f7023 79f7024 ? / ? on-chip ??? on-chip ?? ????????????? ???? on-chip ????? ??? (t a = 25 c) (1/2) ? ?? v dd ? 0.5 + 6.5 v v ss ? 0.5 + 0.3 v ? av ref ? 0.5 v dd + 0.3 ? 1 v regc ? ? 2 v iregc ? 0.5 + 3.6 ? 0.5 v dd + 0.3 v v i1 p30 p34, p121, p122, p125, x1, x2, reset ? 0.3 v dd + 0.3 ? 1 v ? v i2 p20 p27 ? 0.3 av ref + 0.3 ? 1 ? 0.3 v dd + 0.3 ? 1 v v o1 p30 p34, p121, p122 ? 0.3 v dd + 0.3 ? 1 v ? v o2 p20 p27 ? 0.3 av ref + 0.3 ? 1 v ? 1. ? 6.5v 2. ? regc vss(0.47 1 f) ? regc ?????? ?? ? ???????????????? ??????????????? ? ???????? r01uh0312cj0110 rev.1.10 384 2013.11.29 pd79f7023, 79f7024 ?? ??? (t a = 25 c) (2/2) ? ?? 1 ? 10 ma i oh1 ?? p31 p34 ? 25 ma 1 ? 10 ma i oh2 ?? p30 ? 10 ma 1 ? 0.5 ma i oh3 ?? p20 p27 ? 2 ma 1 ? 1 ma ?? i oh4 ?? p121, p122 ? 4 ma 1 30 ma i ol1 ?? p31 p34 55 ma 1 30 ma i ol2 ?? p30 30 ma 1 1 ma i ol3 ?? p20 p27 5 ma 1 4 ma ?? i oh4 ?? p121, p122 10 ma ? t a ? 40 +85 c ? t stg ? 65 +150 c ? 1. ???????????????? ??????????????? 2. ??????????? ? ???????? r01uh0312cj0110 rev.1.10 385 2013.11.29 pd79f7023, 79f7024 ?? x1 (t a = ? 40 +85 c, 2.7 v v dd 5.5 v, v ss = 0 v) ? ? ? ? ? ? / c1 x2x1 v ss c2 x1 ?? (f x ) ? 2.7 v v dd 5.5 v 1.0 10.0 mhz ? ????? ac ? 1. ? x1 ?????????? ? ???? ? ????? ? ???????? ? ?????? vss ? ??????????? ? ???? 2. ??? cpu ?????????? (ostc) ? x1 ????????? ostc ???? (osts) ??? ? ????????? r01uh0312cj0110 rev.1.10 386 2013.11.29 pd79f7023, 79f7024 ?? ? (t a = ? 40 +85 c, 2.7 v v dd 5.5 v, v ss = 0 v) ? ? ? ? t a = ? 20 +70 c 3.92 4 4.08 mhz ? ? (f ih = 4 mhz) ? rsts = 1 t a = ? 40 +85 c 3.88 4 4.12 mhz ? ?????? ac ? (t a = ? 40 +85 c, 2.7 v v dd 5.5 v, v ss = 0 v) ? ? ? ? creg = 2.5 v ?? 216 240 264 khz ? ? f il creg = 1.9 v ?? 192 240 264 khz r01uh0312cj0110 rev.1.10 387 2013.11.29 pd79f7023, 79f7024 ?? dc (1/5) (t a = ? 40 +85 c, 2.7 v v dd 5.5 v, av ref v dd , v ss = 0 v) ? ? ? ? 4.0 v v dd 5.5 v ? 3.0 ma p31 p34 1 2.7 v v dd < 4.0 v ? 2.5 ma 4.0 v v dd 5.5 v ? 6.0 ma i oh1 p31 p34 ? 3 ??? 2.7 v v dd < 4.0 v ? 4.5 ma 4.0 v v dd 5.5 v ? 3.0 ma i oh2 p30 1 2.7 v v dd < 4.0 v ? 2.5 ma p20 p27 1 av ref = v dd ? 100 a ? 1 i oh3 p121 p122 1 ? 100 a 4.0 v v dd 5.5 v 8.5 ma p31 p34 1 2.7 v v dd < 4.0 v 5.0 ma 4.0 v v dd 5.5 v 15.0 ma i ol1 p31 p34 ? 3 ??? 2.7 v v dd < 4.0 v 10.0 ma 4.0 v v dd 5.5 v 8.5 ma i oh2 p30 1 2.7 v v dd < 4.0 v 5.0 ma 4.0 v v dd 5.5 v 8.5 ma i oh3 p122 1 2.7 v v dd < 4.0 v 5.0 ma p20 p27 1 av ref = v dd 400 a ? 2 i ol4 p121 1 400 a ? 1. ? v dd ??????? 2. ? gnd ?????? 3. ??? 70% ( ??? t ?? 0.7 t ?? 0.3 t ??1 ????? 70% ??? ? i oh ??? n%: ? = (i oh 0.7)/(n 0.01) < ?> ??? 50% i oh = ? 20.0 ma ? = ( ? 20.0 0.7)/(50 0.01) = ? 28.0 ma ????????????? ? ???????? r01uh0312cj0110 rev.1.10 388 2013.11.29 pd79f7023, 79f7024 ?? dc (2/5) (t a = ? 40 +85 c, 2.7 v v dd 5.5 v, av ref v dd , v ss = 0 v) ? ? ? ? v ih1 p122 ? , p31 0.7v dd v dd v v ih2 p20 p27 av ref = v dd 0.7av ref av ref v v ih3 p121, p125 0.7v dd v dd v v ih4 p30, p32 p34, reset, exclk 0.8v dd v dd v ??? v ih5 x1, x2 v dd ? 0.1 v dd v v il1 p122 ? , p31 0 0.3v dd v v il2 p20 p27 av ref = v dd 0 0.3av ref v v il3 p121, p125 0 0.3v dd v v il4 p30, p32 p34, reset, exclk 0 0.2v dd v ??? v il5 x1, x2 0 0.1 v 4.0 v v dd 5.5 v, i oh1 = ? 3.0 ma v dd ? 0.7 v v oh1 p30 p34 2.7 v v dd < 4.0 v, i oh1 = ? 2.5 ma v dd ? 0.5 v p20 p27 av ref = v dd , i oh2 = ? 100 a v dd ? 0.5 v ??? v oh2 p121, p122 i oh2 = ? 100 a v dd ? 0.5 v 4.0 v v dd 5.5 v, i ol1 = 8.5 ma 0.8 v v oh1 p30 p34, p122 2.7 v v dd < 4.0 v, i ol1 = 5.0 ma 0.7 v p20 p27 av ref = v dd , i ol2 = 400 a 0.4 v ??? v oh2 p121 i ol2 = 400 a 0.4 v ? ??????? p122/exclk v ih /v il ? ? ???????? r01uh0312cj0110 rev.1.10 389 2013.11.29 pd79f7023, 79f7024 ?? dc (3/5) (t a = ? 40 +85 c, 2.7 v v dd 5.5 v, av ref v dd , v ss = 0 v) ? ? ? ? i lih1 p30 p34, p125/reset v i = v dd 3 a i lih2 p20 p27 v i = av ref = v dd 3 a p121, p122 i/o ??? 3 a ??? i lih3 x1, x2 v i = v dd osc ?? 20 a i lil1 p30 p34, p125/reset v i = v ss ? 3 a i lil2 p20 p27 v i = v ss , av ref = v dd ? 3 a p121, p122 i/o ??? ? 3 a ??? i lil3 x1, x2 v i = v ss osc ?? ? 20 a r plu1 p30 p34 10 20 100 k ? r plu2 p125/reset v i = v ss 75 150 300 k ? ???????? r01uh0312cj0110 rev.1.10 390 2013.11.29 pd79f7023, 79f7024 ?? dc (4/5) (t a = ? 40 +85 c, 2.7 v v dd 5.5 v, av ref v dd , v ss = 0 v) ? ? ? ? ? 1.1 2.7 ma f xh = 10 mhz, rmc = 00h 1.3 3.2 ma ? 0.63 1.6 ma f xh = 5 mhz, rmc = 00h 0.8 2.0 ma cpu 0.37 0.74 ma f ih = 4 mhz, rmc = 59h cpu 0.42 0.84 ma cpu 0.14 0.25 ma i dd1 ?? f ih = 4 mhz, f cpu = 1 mhz v dd = 3.0 v, rmc = 56h cpu 0.18 0.36 ma ? 0.13 1.3 ma f xh = 10 mhz, rmc = 00h 0.36 2.4 ma ? 0.09 0.65 ma f xh = 5 mhz, rmc = 00h 0.27 1.1 ma i dd2 halt ?? f ih = 4 mhz, rmc = 59h 0.12 0.12 0.5 rmc = 00h 1.2 10 a ? ? i dd3 stop ? ? v dd = 5.0 v, creg+poc rmc = 56h/59h 2 10 a ? ?? (v dd, av ref ) ??? v dd v ss ?????? ?? v dd = 3.0 v cpu ???? adc wwdt lvi amp cmp ?? ? ???????? r01uh0312cj0110 rev.1.10 391 2013.11.29 pd79f7023, 79f7024 ?? dc (5/5) (t a = ? 40 +85 c, 2.7 v v dd 5.5 v, av ref v dd , v ss = 0 v) ? ? ? ? ?? ? 1 i wdt v dd = 5.0 v 240khz ???? 5 10 a lvi ? 2 i lvi 9 18 a a/d ? ? 3 i adc 0.86 1.9 ma av ref = v dd = 5.0 v 250 380 a ? ? 3 i amp 1 ? av ref = v dd = 3.0 v 230 321 a av ref = v dd = 5.0 v 80 t.b.d a ? ? 3 i cmp av ref = v dd = 3.0 v 70 t.b.d a ? 1. ???? 240khz ????? pd79f7023 79f7024 ??? i dd1 i dd2 i dd3 i wdt ? 2. ? lvi ?lvi ? pd79f7023 79f7024 ??? i dd1 i dd2 i dd3 i lvi lvi ? 3. ? a/d ? (av ref )? r01uh0312cj0110 rev.1.10 392 2013.11.29 pd79f7023, 79f7024 ?? ac (1) (t a = ? 40 +85 c, 2.7 v v dd 5.5 v, v ss = 0 v) ? ? ? ? creg = 2.5 v ?? 0.2 32 s ?????? t cy ??? (f xp ) creg = 1.9 v ?? 0.5 32 s f prs = f xp 10 mhz ???? f prs f prs = f ih 3.8 4.2 mhz ????? f exclk 2.7 v v dd 5.5 v 1.0 10.0 mhz ??????? ?? t exclkh , t exclkl (1/f exclk 1/2) ? 1 ns ti000, ti010 ??? ? t tih0 , t til0 2.7 v v dd < 4.0 v 2/f sam +0.2 ? s ti51 ? f ti5 2.7 v v dd 5.5 v 10.0 mhz ti51 ????? t tih5 2.7 v v dd 5.5 v 50 ns ????? t inth , t intl 1 s reset ?? t rsl 10 s ? ?????? 00(prm00) ? 0 ? 1 (prm000 prm001) ? f sam = f prs f prs /4 f prs /256???? ti000 ?? f sam = f prs r01uh0312cj0110 rev.1.10 393 2013.11.29 pd79f7023, 79f7024 ?? t cy vs. v dd ( ???? creg = 2.5 v ?? ) 5.0 1.0 2.0 0.4 0.2 0.1 supply voltage v dd [v] cycle time t cy [ s] 0 10 1.0 2.0 3.0 4.0 5.0 6.0 5.5 2.7 100 0.01 guaranteed operation range 32 r01uh0312cj0110 rev.1.10 394 2013.11.29 pd79f7023, 79f7024 ?? t cy vs. v dd ( ???? creg = 1.9 v ?? ) 5.0 1.0 2.0 0.5 0.2 0.1 0 10 1.0 2.0 3.0 4.0 5.0 6.0 5.5 2.7 100 0.01 32 supply voltage v dd [v] cycle time t cy [ s] guaranteed operation range ac ? 0.8v dd 0.2v dd test points 0.8v dd 0.2v dd r01uh0312cj0110 rev.1.10 395 2013.11.29 pd79f7023, 79f7024 ?? ????? exclk 0.7v dd (min.) 0.3v dd (max.) 1/f exclk t exclkl t exclkh ti ti000, ti010 t til0 t tih0 ti51 1/f ti5 t til5 t tih5 ? intp0, intp1 t intl t inth reset reset t rsl r01uh0312cj0110 rev.1.10 396 2013.11.29 pd79f7023, 79f7024 ?? (2) ? (t a = ? 40 +85 c, 2.7 v v dd 5.5 v, v ss = 0 v) (a) uart0 ( ?? ) ? ? ? ? ? 312.5 kbps (b) ocd (uart0) ? ? ? ? f clk /32 f clk /8 bps ocd ?? (f clk = 4 m, v dd 2.7 v, c b = 50 pf) 125/250/500 kbps ? ?? (f clk = 4 m, v dd 2.7 v, c b = 50 pf) 125/250/500 kbps x2/ ? f ocdb v dd 2.7 v 10 mhz r01uh0312cj0110 rev.1.10 397 2013.11.29 pd79f7023, 79f7024 ?? ?? (1) a/d ? (t a = ? 40 +85 c, 2.7 v av ref v dd 5.5 v, v ss = 0 v) ? ? ? ? ? r es 8 bit 4.0 v av ref 5.5 v 0.6 %fsr ? 1, 2 a inl 2.7 v av ref 5.5 v 0.8 %fsr 4.0 v av ref 5.5 v 6.1 36.7 s ?? t conv 2.7 v av ref 5.5 v 6.1 36.7 s 4.0 v av ref 5.5 v 0.6 %fsr ? 1, 2 e zs 2.7 v av ref 5.5 v 0.8 %fsr 4.0 v av ref 5.5 v 0.6 %fsr ? 1, 2 e fs 2.7 v av ref 5.5 v 0.8 %fsr ?? v ain v ss av ref v ? 1. ( 1/2 lsb) 2. ??????(%fsr) (2) ? 0, 1 (t a = ? 40 +85 c, 2.7 v v dd av ref 5.5 v, v ss = 0 v, ?r l = 47 k , c l = 50 pf) ? ? ? ? ??? ? 1 v iop0 v bias = 1/2 v dd , av ref = 3.0 v 3 mv ??? psrr op0 av ref = 3.0 v 70 db ??? v ohop0 av ref = 3.0 v, i oh = ? 500 a av ref ? 0.2 v ??? v olop0 av ref = 3.0 v, i ol = 500 a 0.1 v ?? v icmop0 av ref = 3.0 v 0 av ref ? 0.6 v av ref = 3.0 v 1.8 v/ s ?? sr op0 av ref = 5.0 v 2.0 v/ s av ref = 3.0 v, v in = 0.1 v, f = 1 khz 73 av ref = 3.0 v, v in = av ref /2 v, f = 1 khz 60 ?? inoise) av ref = 3.0 v, v in = av ref ? 0.6 v, f = 1 khz 55 zh /nv ? av ref = 3.0 v 40 deg ? av op0 av ref = 3.0 v 100 db gbw op0 av ref = 5.0 v/3.0 v 3.0 mhz ??? 2 t op0 av ref = 3.0 v 10 s ? 1. ?? 2. ? (opamp0e/opamp1e = 1) ?? dc ac ???? r01uh0312cj0110 rev.1.10 398 2013.11.29 pd79f7023, 79f7024 ?? (3) cmp (t a = ? 40 +85 c, 2.7 v v dd 5.5 v, v ss = v ss = 0 v, ? r l = 47 k , c l = 50 pf) ? ? ? ? ??? v iocmp 5 40 mv cmpin 0 av ref v ? v icmp cmpcom 0.045 0.9av ref v ?? t cr , t cf 100 mv 70 150 ns ??? t cmp 1 s ?????? t cmpl 125 ns ? ? (opamp0e/opamp1e = 1) ???? dc ac ??????? -100 mv +100 mv 0 v av ref voltage output voltage v o input voltage v in cmpref t cr t cf (4) poc (t a = ? 40 +85 c, v ss = 0 v) ? ? ? ? ? v poc0 1.44 1.59 1.74 v ?? t pth v dd ?? 0 v v poc0 0.5 v/ms t pw ? 200 s poc time t pth t pw supply voltage (v dd ) detection voltage (min.) detection voltage (typ.) detection voltage (max.) r01uh0312cj0110 rev.1.10 399 2013.11.29 pd79f7023, 79f7024 ?? (5) ?? (t a = ? 40 +85 c, v ss = 0 v) ? ? ? ? 2.7v(v dd (min.)) ?? ? (v dd :0 v 2.7 v) t pup1 ? reset ?lvi ? (lvistart ( ?? ) = 0) 5.4 ms 2.7v(v dd (min.)) ?? ? ( reset v dd :2.7 v) t pup2 ? reset ? lvi ? (lvistart ( ?? ) = 0) 1.9 ms ? ????? ???? ? ? reset ? ? ? reset ?(poc ? reset ? ?? ) supply voltage (v dd ) time 2.7 v 0 v poc internal signal t pup1 supply voltage (v dd ) time 2.7 v t pup2 0 v poc internal signal reset signal internal reset signal (6) ? (t a = ? 40 +85 c, v ss = 0 v) ? ? ? ? nv ?? 2.3 2.5 2.7 v creg ? v regc 2.7 v v dd 5.5 v lv ?? 1.7 1.9 2.1 v r01uh0312cj0110 rev.1.10 400 2013.11.29 pd79f7023, 79f7024 ?? (7) lvi (t a = ? 40 +85 c, v pdr v dd 5.5 v, v ss =0 v) ? ? ? ? v lvi0 4.24 0.1 v v lvi1 4.09 0.1 v v lvi2 3.93 0.1 v v lvi3 3.78 0.1 v v lvi4 3.62 0.1 v v lvi5 3.47 0.1 v v lvi6 3.32 0.1 v v lvi7 3.16 0.1 v v lvi8 3.01 0.1 v v lvi9 2.85 0.1 v ?? v lvi10 2.70 0.1 v ? ????? v ddlvi lvi ???? (lvistart = 1) 2.5 2.7 2.9 v t lw 200 s ??? t lwait 10 s ? ??? (lvim)? 7 (lvion) 1 ????? ? v lvi(n ? 1) > v lvin n = 1 10 lvi ? supply voltage (v dd ) time detection voltage (min.) detection voltage (typ.) detection voltage (max.) t lw t lwait lvion 1 r01uh0312cj0110 rev.1.10 401 2013.11.29 pd79f7023, 79f7024 ?? ? stop ??????? (t a = ? 40 +85 c) ? ? ? ? ?? v dddr 1.44 ? 5.5 v ? ?? poc ??????? poc ??? poc ???? v dd stop instruction execution standby release signal (interrupt request) stop mode data retention mode v dddr operation mode (t a = ? 40 +85 c, 2.7 v v dd 5.5 v, v ss = 0 v) ? ? ? ? ? v dd i dd 4.5 11.0 ma ? t eraca 20 200 ms ? t erasa 20 200 ms ? 8 ? t wrwa 10 100 s 1 ? ? c erwr 1 + 1 = 1 ??? renesas electronics ? ??? 15 1000 ? ????? 10 40 c:? 40 +85 c ?? ? ??? (rmc = 56/59h ) ?? 2.7 5.5 v@8 mhz ( ? ) ? ????? ???? r01uh0312cj0110 rev.1.10 402 2013.11.29 pd79f7023, 79f7024 ?? ??? ?? ??? ? pd79f7023mc-caa-ax, 79f7024mc-caa-ax 11 20 1 m s s v 20-pin plastic ssop (7.62 mm (300)) detail of lead end note each lead centerline is located within 0.13 mm of its true position (t.p.) at maximum material condition. item dimensions a b c e f g h i j l m n d 0.325 0.65 (t.p.) 0.10 0.05 1.30 0.10 1.20 8.10 0.20 6.10 0.10 1.00 0.20 0.50 0.13 0.10 0.22 + 0.10 ? 0.05 k 0.15 + 0.05 ? 0.01 p 3 + 5 ? 3 (unit:mm) p20mc-65-caa v w w a i f g e c n d m b k h j p u t l 6.50 0.10 t u v 0.25(t.p) 0.60 0.15 0.25 max. w 0.15 max. 10 r01uh0312cj0110 rev.1.10 403 2013.11.29 pd79f7023, 79f7024 ?? ? ?? ? 26.1 ? ????? ? cpu ??????? ? cpu ???? cpu ?????????? ??? ?????????? cpu ??? ?cpu ??????????????? ?????? 26-1 ?????? r01uh0312cj0110 rev.1.10 404 2013.11.29 pd79f7023, 79f7024 ?? ? 26.2 ?? cpu ???? cpu ?? 21-1 ? 26-1. ??? cpu ?? ? ? ? ? uart0 asis0 ? 1 ??? adm0 ads adpc ? adcrh 1 5 clocks ( ? f ad = f prs /2 ?) 1 7 clocks ( ? f ad = f prs /3 ?) 1 9 clocks ( ? f ad = f prs /4 ?) 2 13 clocks ( ? f ad = f prs /6 ?) 2 17 clocks ( ? f ad = f prs /8 ?) 2 25 clocks ( ? f ad = f prs /12 ?) a/d ? ?????? f cpu f prs ???1????? < ?? > ? ?? = 2 f cpu f ad + 1 * ???? 0.5 ?????? > 0.5 ? f ad : a/d ??? (f prs f prs /12) f cpu : cpu ?? f prs : ???? f xp : ???? < / ??> ? cpu ? (f xp ),a/d ???? (f prs /12) ? :cpu ? (f sub ), a/d ???? (f prs ) ? ?? (f prs ) ?????????? ? ?? cpu ?(f cpu ) r01uh0312cj0110 rev.1.10 405 2013.11.29 pd79f7023, 79f7024 ? a ? a ??? pd79f7023, 79f7024 ??? ? a-1 ??? r01uh0312cj0110 rev.1.10 406 2013.11.29 pd79f7023, 79f7024 ? a ? a-1. ? language processing software debugging software host machine (pc or ews) usb interface cable note 3 qb-mini2 note 3 78k0-ocd board notes 3, 4 target connector target system software package control software (windows only) note 2 connection cable (16-pin cable) note 3 ? assembler package ? c compiler package ? device file note 1 ? integrated debugger note 1 ? software package ? project manager ? 1. ????? pd79f7023, 79f7024 ??? ? id78k0-qb ( http://www2.renesas.com/m icro/en/ods/index.html ) 2. ? pm+ ?? pm+ ? windows ? 3. ??? qb-mini2 ? usb ????10 ?16 78k0-ocd ^ ?????qb-mini2 ( http://www2.renesas.com/micro/en/ods/index.html ) 4. ? qb-mini2 ?????? r01uh0312cj0110 rev.1.10 407 2013.11.29 pd79f7023, 79f7024 ? a a.1 sp78k0 78k0 ? 78k0 ???? a.2 ? ra78k0 ? mnemonics ???????? ???????????? ???? < pc ? ra78k0 ?? > ?? dos ? ? windows ?? (pm+) windows ? pm+ ?? cc78k0 ? c c ??????? ????? < pc ? cc78k0 ?? > c ? dos ? ? windows ?? (pm+) windows ? pm+ ?? ? ( ) ?? ???? ra78k0, cc78k0 id78k0-qb ? ???????? ? ra78k0 cc78k0 ? 4.00 ???????? ra78k0 cc78k0 ?? r01uh0312cj0110 rev.1.10 408 2013.11.29 pd79f7023, 79f7024 ? a a.3 ? a.3.1 ? pg-fp5 fl-pr5 pg-fp5, fl-pr5 ?? fa-78f0567mc-caa-rx ? ? 1. fl-pr5 fa-78f0567mc-caa-rx ? naito densei machida mfg. co., ltd ?? tel: +81-42-750-4172 naito densei machida mfg. co., ltd. 2. ? a.3.2 ?t?????? qb-mini2 qb-mini2 ?????? ?? ?? ? pd79f7023, 79f7024 ? ????????????? ???? (16 ) usb ??? ?? 16 ? (2.54 mm ) ? ????qb-mini2 ( http://www2.renesas.com/micro/en/ods/index.html ) r01uh0312cj0110 rev.1.10 409 2013.11.29 pd79f7023, 79f7024 ? a a.4 ??? qb-mini2 ?????? ? pd79f7023, 79f7024 ????????? ??? ??? ??? ???????? (16 ) usb ?? o 78k0-ocd ?? ?? 16 ? (2.54 mm ) ? ????qb-mini2 ( http://www2.renesas.com/micro/en/ods/index.html ) a.5 ?? id78k0-qb ? ? 78k0 ?? id78k0-qb ? windows ?? ?? c ???????????? ?????????? ?? ?? r01uh0312cj0110 rev.1.10 410 2013.11.29 ?? pd79f7023, 79f7024 ?? ?? ? 1.00 2012.03.16 ? 1.10 2013.11.29 ? ??? pd79f7023, 79f7024 ?? ?? publication date: rev.1.10 nov 29, 2013 published by: renesas electronics corporation htt p ://www.renesas.co m refer to "htt p ://www.renesas.com/" for the latest and detailed information . r e n esas el ec tr o ni cs am e ri ca in c . 2880 scott boulevard santa clara , ca 95050-2554 , u.s.a . tel: +1-408-588-6000, fax: +1-408-588-6130 renesas electronics canada limited 1101 nicholson road, newmarket, ontario l3y 9c3, canada tel: +1-905-898-5441, fax: +1-905-898-3220 renesas electronics europe limited dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, u.k tel: +44-1628-651-700, fax: +44-1628-651-804 renesas electronics europe gmbh arcadiastrasse 10, 40472 dsseldorf, germany tel: +49-211-65030, fax: +49-211-6503-1327 renesas electronics (china) co., ltd. 7th floor, quantum plaza, no.27 zhichunlu haidian district, beijing 100083, p.r.china tel: +86-10-8235-1155, fax: +86-10-8235-7679 renesas electronics (shanghai) co., ltd. unit 204, 205, azia center, no.1233 lujiazui ring rd., pudong district, shanghai 200120, china tel: +86-21-5877-1818, fax: +86-21-6887-7858 / -7898 renesas electronics hong kong limited unit 1601-1613, 16/f., tower 2, grand century place, 193 prince edward road west, mongkok, kowloon, hong kong tel: +852-2886-9318, fax: +852 2886-9022/9044 renesas electronics taiwan co., ltd. 13f, no. 363, fu shing north road, taipei, taiwan tel: +886-2-8175-9600, fax: +886 2-8175-9670 renesas electronics singapore pte. ltd. 80 bendemeer road, unit #06-02 hyflux innovation centre singapore 339949 tel: +65-6213-0200, fax: +65-6213-0300 renesas electronics mala y sia sdn.bhd. unit 906, block b, menara amcorp, amcorp trade centre, no. 18, jln persiaran barat, 46050 petalin g jaya, selan g or darul ehsan, malaysi a tel: +60-3-7955-9390 , fax: +60-3-7955-951 0 renesas electronics korea co. , ltd . 11f., samik lavied' or bld g ., 720-2 yeoksam-don g , kan g nam-ku, seoul 135-080, korea tel: +82-2-558-3737 , fax: +82-2-558-514 1 s ale s o ffi c e s ? 2013 renesas electronics corporation. all rights reserved. ? colo p hon 1.3 pd79f7023, 79f7024 r01uh0312cj0110 |
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